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Searched refs:REG_ACCEL_CONFIG0 (Results 1 – 7 of 7) sorted by relevance

/Zephyr-Core-3.7.0/drivers/sensor/tdk/icm42605/
Dicm42605_setup.c23 result = inv_spi_read(&cfg->spi, REG_ACCEL_CONFIG0, &databuf, 1); in icm42605_set_fs()
31 result = inv_spi_single_write(&cfg->spi, REG_ACCEL_CONFIG0, &databuf); in icm42605_set_fs()
63 result = inv_spi_read(&cfg->spi, REG_ACCEL_CONFIG0, &databuf, 1); in icm42605_set_odr()
99 result = inv_spi_single_write(&cfg->spi, REG_ACCEL_CONFIG0, &databuf); in icm42605_set_odr()
Dicm42605_reg.h48 #define REG_ACCEL_CONFIG0 0x50 macro
/Zephyr-Core-3.7.0/drivers/sensor/tdk/icm42688/
Dicm42688_common.c172 LOG_DBG("ACCEL_CONFIG0 (0x%x) 0x%x", REG_ACCEL_CONFIG0, accel_config0); in icm42688_configure()
173 res = icm42688_spi_single_write(&dev_cfg->spi, REG_ACCEL_CONFIG0, accel_config0); in icm42688_configure()
Dicm42688_reg.h76 #define REG_ACCEL_CONFIG0 (REG_BANK0_OFFSET | 0x50) macro
Dicm42688_emul.c135 icm42688_emul_get_reg(target, REG_ACCEL_CONFIG0, &reg, 1); in icm42688_emul_get_accel_settings()
/Zephyr-Core-3.7.0/drivers/sensor/tdk/icm42670/
Dicm42670_reg.h55 #define REG_ACCEL_CONFIG0 (REG_BANK0_OFFSET | 0x21) macro
Dicm42670.c55 return icm42670_spi_update_register(&cfg->spi, REG_ACCEL_CONFIG0, in icm42670_set_accel_fs()
120 return icm42670_spi_update_register(&cfg->spi, REG_ACCEL_CONFIG0, (uint8_t)MASK_ACCEL_ODR, in icm42670_set_accel_odr()