PLL_OPT_OUTPUT_DIV (reference) in projects: Zephyr-Core-3.7.0

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/Zephyr-Core-3.7.0/soc/atmel/sam/sam4l/
D	soc.c	`99 #define PLL_OPT_OUTPUT_DIV 1 in pll_config_init() macro 124 PLL_OPT_OUTPUT_DIV)); in pll_config_init()`

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TraceRecorderSource-3.4.0
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