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Searched refs:PHY_TSEL_REG_SDR (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.7.0/drivers/flash/
Dflash_cadence_nand_ll.h245 #define PHY_TSEL_REG_SDR (0x00000000) macro
Dflash_cadence_nand_ll.c230 sys_write32(PHY_TSEL_REG_SDR, (base_address + PHY_TSEL_REG_OFFSET)); in cdns_nand_set_opr_mode()