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Searched refs:MISC_REG_0 (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.7.0/arch/xtensa/core/
Dgdbstub.c75 MISC_REG_0 = 244, enumerator
298 case MISC_REG_0: in read_sreg()
299 val = get_one_sreg(MISC_REG_0); in read_sreg()