Home
last modified time | relevance | path

Searched refs:MIP_MEIP (Results 1 – 4 of 4) sorted by relevance

/Zephyr-Core-3.7.0/soc/ite/ec/it8xxx2/
Dsoc.c227 csr_clear(mie, MIP_MEIP); in riscv_idle()
264 csr_set(mie, MIP_MEIP); in riscv_idle()
/Zephyr-Core-3.7.0/include/zephyr/arch/riscv/
Dcsr.h112 #define MIP_MEIP (1 << IRQ_M_EXT) macro
/Zephyr-Core-3.7.0/drivers/interrupt_controller/
Dintc_ite_it8xxx2_v2.c265 csr_set(mie, MIP_MEIP); in soc_interrupt_init()
Dintc_ite_it8xxx2.c275 csr_set(mie, MIP_MEIP); in soc_interrupt_init()