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Searched refs:MIO_PIN_L0_SEL_MASK (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.7.0/soc/xlnx/zynq7000/common/
Dpinctrl_soc.h40 #define MIO_PIN_L0_SEL_MASK BIT(1) macro
41 #define MIO_PIN_L0_SEL(val) FIELD_PREP(MIO_PIN_L0_SEL_MASK, val)
48 (MIO_PIN_L3_SEL_MASK | MIO_PIN_L2_SEL_MASK | MIO_PIN_L1_SEL_MASK | MIO_PIN_L0_SEL_MASK)