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Searched refs:MCUX_PORT0_CLK (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.7.0/include/zephyr/dt-bindings/clock/
Dmcux_lpc_syscon_clock.h70 #define MCUX_PORT0_CLK MCUX_LPC_CLK_ID(0x0C, 0x00) macro
/Zephyr-Core-3.7.0/drivers/clock_control/
Dclock_control_mcux_syscon.c48 case MCUX_PORT0_CLK: in mcux_lpc_syscon_clock_control_on()
/Zephyr-Core-3.7.0/dts/arm/nxp/
Dnxp_mcxn94x_common.dtsi80 clocks = <&syscon MCUX_PORT0_CLK>;