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Searched refs:IT8XXX2_ECPM_SCDCR1 (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.7.0/soc/ite/ec/it8xxx2/
Dsoc.c150 IT8XXX2_ECPM_SCDCR1 = pll->div_uart; in chip_run_pll_sequence()
/Zephyr-Core-3.7.0/soc/ite/ec/common/
Dchip_chipregs.h1275 #define IT8XXX2_ECPM_SCDCR1 ECREG(IT8XXX2_ECPM_BASE + 0x0d) macro