Home
last modified time | relevance | path

Searched refs:FP (Results 1 – 17 of 17) sorted by relevance

/Zephyr-Core-3.7.0/doc/kernel/services/other/
Dfloat.rst30 No FP registers mode
39 Unshared FP registers mode
55 Shared FP registers mode
79 The Shared FP registers mode is the default Floating Point
83 treats *all* threads as FPU users when shared FP registers mode is enabled.
88 Pretag a thread that intends to use the FP registers by
106 point registers, the kernel restores the *callee-saved* FP registers of
107 the switched-in thread and the *caller-saved* FP context is restored from
108 the thread's stack. Thus, the kernel does not save or restore the FP
109 context of threads that are not using the FP registers.
[all …]
/Zephyr-Core-3.7.0/cmake/compiler/clang/
Dtarget_arm.cmake18 # the FP "hard" ABI must be used in order to facilitate the FP register
/Zephyr-Core-3.7.0/cmake/compiler/gcc/
Dtarget_arm.cmake18 # the FP "hard" ABI must be used in order to facilitate the FP register
/Zephyr-Core-3.7.0/arch/arm/core/mpu/
DKconfig76 Floating Point (FP) context. The width of the guard is set to
78 frame when the floating point context is active. The FP context
79 is only stacked in sharing FP registers mode, therefore, the
/Zephyr-Core-3.7.0/doc/hardware/arch/
Darm_cortex_m.rst147 * the floating point callee-saved registers (S16 - S31) in the thread's container for FP
148 callee-saved registers, if the current thread has an active FP context
158 * restores the FP callee-saved registers if the switched-in thread had
159 an active FP context before being switched-out
528 Both unshared and shared FP registers mode are supported in Cortex-M (see
533 sharing FP registers mode (:kconfig:option:`CONFIG_FPU_SHARING`)
535 may activate a floating point context by generating FP instructions
540 The developers can still disable the FP sharing mode in their
541 application projects, and switch to Unshared FP registers mode,
542 if it is guaranteed that the image code does not generate FP
[all …]
/Zephyr-Core-3.7.0/scripts/coredump/gdbstubs/arch/
Drisc_v.py25 FP = 8 variable in RegNum
/Zephyr-Core-3.7.0/tests/arch/arm/arm_thread_swap/
DREADME.txt20 space or FP shared registers) is saved and restored properly.
/Zephyr-Core-3.7.0/boards/bcdevices/plt_demo_v2/doc/
Dindex.rst46 - Tag-Connect TC2030-FP 6-pin Debug Connector
/Zephyr-Core-3.7.0/lib/os/
DKconfig.cbprintf86 overall code size related to FP support.
/Zephyr-Core-3.7.0/modules/cmsis-dsp/
DKconfig260 # FP support configurations.
/Zephyr-Core-3.7.0/arch/
DKconfig962 context by generating FP instructions for any thread, and that
964 The developers can still disable the FP sharing mode in their
965 application projects, and switch to Unshared FP registers mode,
966 if it is guaranteed that the image code does not generate FP
/Zephyr-Core-3.7.0/arch/x86/
DKconfig384 that a particular SOC is not vulnerable to the Lazy FP CPU
/Zephyr-Core-3.7.0/doc/releases/
Drelease-notes-2.5.rst224 Shared FP registers mode.
225 * Enhanced Cortex-M Shared FP register mode by implementing
226 dynamic lazy FP register stacking in threads.
264 * FPU is supported in both shared and unshared FP register mode.
1478 * :github:`29590` - ARM: FPU: using Unshared FP Services mode can still result in corrupted floatin…
Drelease-notes-2.3.rst1083 * :github:`23946` - ARM soft FP ABI support is broken
Drelease-notes-2.0.rst967 * :github:`16770` - Complete FP support for ARC
Drelease-notes-3.2.rst1967 * :github:`49631` - arch: arm: FP stack warning with GCC 12 and ``CONFIG_FPU=y``
Drelease-notes-1.14.rst527 - Lazy FP State Restore (CVE-2018-3665)