Searched refs:Debug (Results 1 – 25 of 237) sorted by relevance
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| /Zephyr-Core-3.7.0/drivers/dp/ |
| D | Kconfig | 6 bool "Debug Port interface driver [EXPERIMENTAL]"
9 Enable Debug Port interface driver
18 int "Debug Port driver initialization priority"
24 bool "Serial Wire Debug Port bit-bang driver"
29 Serial Wire Debug Port bit-bang driver.
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| /Zephyr-Core-3.7.0/samples/subsys/logging/syst/ |
| D | README.rst | 93 [ 0.020000] <dbg> syst: Debug message example.
94 [ 0.020000] <dbg> syst: Debug message example, 1
95 [ 0.020000] <dbg> syst: Debug message example, 1, 2
96 [ 0.020000] <dbg> syst: Debug message example, 1, 2, 3
97 [ 0.020000] <dbg> syst: Debug message example, 1, 2, 3, 0x4
103 [ 0.030000] <dbg> syst: Debug message example, %f
154 Debug message example.
155 Debug message example, 1
156 Debug message example, 1, 2
157 Debug message example, 1, 2, 3
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| /Zephyr-Core-3.7.0/soc/microchip/mec/mec172x/ |
| D | Kconfig | 25 Select Debug SoC interface support for MEC172X SoC family
30 Debug port is disabled, JTAG/SWD cannot be enabled. JTAG_RST#
35 bool "Debug support via Serial wire debug"
40 bool "Debug support via Serial wire debug with tracing enabled"
54 bool "Debug support via Serial wire debug"
60 bool "debug support via Serial Wire Debug and Viewer"
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| /Zephyr-Core-3.7.0/samples/subsys/debug/debugmon/ |
| D | README.rst | 3 Debug monitor
9 The Debug Monitor sample shows a basic configuration of debug monitor feature.
24 #. Support Debug Monitor feature (available on Cortex-M processors with the exception of Cortex-M0)
32 Build and flash Debug Monitor as follows, changing ``reel_board`` for your board:
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| /Zephyr-Core-3.7.0/soc/microchip/mec/mec15xx/ |
| D | Kconfig | 49 Select Debug SoC interface support for MEC15xx SoC family
54 Debug port is disabled, JTAG/SWD cannot be enabled. JTAG_RST#
59 bool "Debug support via Serial wire debug"
64 bool "Debug support via Serial wire debug with tracing enabled"
79 bool "Debug support via Serial wire debug"
85 bool "debug support via Serial Wire Debug and Viewer"
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| /Zephyr-Core-3.7.0/modules/uoscore-uedhoc/ |
| D | Kconfig | 15 bool "Debug logs in the uoscore library"
30 bool "Debug logs in the uedhoc library"
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| /Zephyr-Core-3.7.0/scripts/west_commands/ |
| D | debug.py | 16 class Debug(WestCommand): class
19 super(Debug, self).__init__(
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| /Zephyr-Core-3.7.0/boards/nordic/nrf54h20dk/support/ |
| D | nrf54h20_cpuapp.JLinkScript | 1 // Debug Halting Control and Status Register
7 // Debug Exception and Monitor Control Register
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| D | nrf54h20_cpurad.JLinkScript | 1 // Debug Halting Control and Status Register
7 // Debug Exception and Monitor Control Register
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| /Zephyr-Core-3.7.0/samples/subsys/debug/ |
| D | index.rst | 3 Debug Samples
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| /Zephyr-Core-3.7.0/subsys/dap/ |
| D | Kconfig | 5 bool "Debug Access Port support [EXPERIMENTAL]"
9 Debug Access Port support (currently CMSIS DAP only)
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| /Zephyr-Core-3.7.0/doc/develop/flash_debug/ |
| D | probes.rst | 3 Debug Probes
7 Zephyr application running on a separate board. Debug probes usually allow
14 Debug probes are usually connected to your host workstation via USB; they
16 connect to the device running Zephyr using the JTAG or SWD protocols. Debug
40 || *Debug Probes & Host Tools* | Host Too…
42 | | **J-Link Debug** | **OpenOCD** | **pyOCD…
51 | Debug Probes +-------------------------+--------------------+--------------------+-------------…
54 | | **NXP S32 Debug Probe** | | | …
74 NXP Onboard Debug Probes
93 MCU-Link Onboard Debug Probe
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| /Zephyr-Core-3.7.0/boards/st/nucleo_wl55jc/support/ |
| D | openocd.cfg | 7 # Debug compatible reset configuration (default)
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| /Zephyr-Core-3.7.0/boards/arm/fvp_baser_aemv8r/doc/ |
| D | debug-with-arm-ds.rst | 3 Debug with Arm DS
87 From ``Project Explorer``, right click ``FVP_BaseR_AEMv8R`` and select ``Debug as -> Debug configur…
98 …- In ``Select target`` box, select ``Imported -> FVP_BaseR_AEMv8R -> Bare Metal Debug -> ARMAEMv8-…
133 After all these changes are made, click ``Apply``, then click ``Debug``. DS will
135 connected in ``Debug Control`` window.
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| /Zephyr-Core-3.7.0/boards/phytec/mimx8mm_phyboard_polis/ |
| D | mimx8mm_phyboard_polis_mimx8mm6_m4.dts | 68 /* UART usually used from A53 Core (1st tty on Debug USB connector */
75 /* UART of the M4 Core (2nd tty on Debug USB connector) */
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| /Zephyr-Core-3.7.0/boards/cypress/cy8ckit_062_ble/support/ |
| D | openocd.cfg | 9 # By default connect over Debug USB port
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| /Zephyr-Core-3.7.0/boards/cypress/cy8ckit_062_wifi_bt/support/ |
| D | openocd.cfg | 9 # By default connect over Debug USB port
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| /Zephyr-Core-3.7.0/boards/infineon/cy8cproto_062_4343w/support/ |
| D | openocd.cfg | 9 # By default connect over Debug USB port
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| /Zephyr-Core-3.7.0/boards/renesas/ek_ra8m1/doc/ |
| D | index.rst | 30 - USB (Debug, Full Speed, High Speed)
33 - Three Debug modes
35 - Debug on-board (SWD)
36 - Debug in (ETM, SWD and JTAG)
37 - Debug out (SWD)
43 - Debug LED (yellow) indicating the debug connection
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| /Zephyr-Core-3.7.0/boards/infineon/cy8cproto_063_ble/support/ |
| D | openocd.cfg | 10 # By default connect over Debug USB port
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| /Zephyr-Core-3.7.0/soc/microchip/mec/ |
| D | Kconfig | 207 bool "Debug console output"
220 Select Debug SoC interface support for MEC SoC family
225 Debug port is disabled, JTAG/SWD cannot be enabled. JTAG_RST#
230 bool "Debug support via Serial wire debug"
235 bool "Debug support via Serial wire debug with tracing enabled"
248 bool "Debug support via Serial wire debug"
255 bool "debug support via Serial Wire Debug and Viewer"
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| /Zephyr-Core-3.7.0/boards/96boards/carbon/doc/ |
| D | nrf51822.rst | 87 :alt: 96Boards Carbon nRF51 Debug
89 96Boards Carbon nRF51 Debug
94 It uses the `Black Magic Debug Probe`_ as an SWD programmer, which can
97 Magic Debug Probe enumerates as a USB serial device as documented on
160 .. _Black Magic Debug Probe:
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| /Zephyr-Core-3.7.0/boards/ene/kb1200_evb/doc/ |
| D | index.rst | 22 - ENE Debug interface
73 If the correct headers are installed, this board supports SWD Debug Interface.
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| /Zephyr-Core-3.7.0/boards/silabs/radio_boards/slwrb4104a/support/ |
| D | openocd.cfg | 4 # By default connect over Debug USB port using the J-Link interface
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| /Zephyr-Core-3.7.0/boards/silabs/radio_boards/slwrb4161a/support/ |
| D | openocd.cfg | 4 # By default connect over Debug USB port using the J-Link interface
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