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Searched refs:DT_ENUM_IDX_OR (Results 1 – 18 of 18) sorted by relevance

/Zephyr-Core-3.7.0/include/zephyr/drivers/mspi/
Ddevicetree.h36 .io_mode = DT_ENUM_IDX_OR(mspi_dev, mspi_io_mode, \
38 .data_rate = DT_ENUM_IDX_OR(mspi_dev, mspi_data_rate, \
40 .cpp = DT_ENUM_IDX_OR(mspi_dev, mspi_cpp_mode, MSPI_CPP_MODE_0), \
41 .endian = DT_ENUM_IDX_OR(mspi_dev, mspi_endian, \
43 .ce_polarity = DT_ENUM_IDX_OR(mspi_dev, mspi_ce_polarity, \
50 .cmd_length = DT_ENUM_IDX_OR(mspi_dev, command_length, 0), \
51 .addr_length = DT_ENUM_IDX_OR(mspi_dev, address_length, 0), \
/Zephyr-Core-3.7.0/soc/nxp/imxrt/imxrt11xx/
Dpinctrl_soc.h61 (DT_ENUM_IDX_OR(node_id, drive_strength, 0) << MCUX_IMX_PDRV_SHIFT) | \
69 (DT_ENUM_IDX_OR(node_id, drive_strength, 0) << MCUX_IMX_DSE_SHIFT) | \
70 (DT_ENUM_IDX_OR(node_id, slew_rate, 0) << MCUX_IMX_SRE_SHIFT) | \
78 (DT_ENUM_IDX_OR(node_id, drive_strength, 0) << MCUX_IMX_DSE_SHIFT) | \
79 (DT_ENUM_IDX_OR(node_id, slew_rate, 0) << MCUX_IMX_SRE_SHIFT) | \
87 (DT_ENUM_IDX_OR(node_id, drive_strength, 0) << MCUX_IMX_DSE_SHIFT) | \
88 (DT_ENUM_IDX_OR(node_id, slew_rate, 0) << MCUX_IMX_SRE_SHIFT) | \
/Zephyr-Core-3.7.0/soc/microchip/mec/common/
Dsoc_dt.h50 ((((uint8_t)DT_ENUM_IDX_OR(MCHP_DT_NODE_FROM_VWTABLE(vw), reset_state, 0)) & 0x3) << 2) | \
51 ((((uint8_t)DT_ENUM_IDX_OR(MCHP_DT_NODE_FROM_VWTABLE(vw), reset_source, 0)) & 0x7) << 4)
/Zephyr-Core-3.7.0/soc/nxp/lpc/lpc51u68/
Dpinctrl_soc.h31 IOCON_PIO_I2CDRIVE(DT_ENUM_IDX_OR(node_id, nxp_i2c_speed, 0)) | \
32 IOCON_PIO_I2CFILTER(DT_ENUM_IDX_OR(node_id, nxp_i2c_filter, 0)))
/Zephyr-Core-3.7.0/soc/nxp/lpc/lpc54xxx/
Dpinctrl_soc.h31 IOCON_PIO_I2CDRIVE(DT_ENUM_IDX_OR(node_id, nxp_i2c_speed, 0)) | \
32 IOCON_PIO_I2CFILTER(DT_ENUM_IDX_OR(node_id, nxp_i2c_filter, 0)))
/Zephyr-Core-3.7.0/soc/nxp/imx/imx8ulp/
Dpinctrl_soc.h36 ((DT_ENUM_IDX_OR(node_id, drive_strength, 0) << IOMUXC_PCR_DSE_SHIFT) | \
38 (DT_ENUM_IDX_OR(node_id, slew_rate, 0) << IOMUXC_PCR_SRE_SHIFT) | \
/Zephyr-Core-3.7.0/soc/nxp/lpc/lpc55xxx/
Dpinctrl_soc.h41 IOCON_PIO_SSEL(DT_ENUM_IDX_OR(node_id, power_source, 0)) | \
45 IOCON_PIO_I2CFILTER(DT_ENUM_IDX_OR(node_id, nxp_i2c_filter, 0)))
/Zephyr-Core-3.7.0/soc/nxp/lpc/lpc11u6x/
Dpinctrl_soc.h34 IOCON_PIO_I2CMODE((DT_ENUM_IDX_OR(node_id, nxp_i2c_filter, 0) << 1)))
/Zephyr-Core-3.7.0/drivers/regulator/
Dregulator_adp5360.c289 .dly_idx = DT_ENUM_IDX_OR(node_id, adi_switch_delay_us, -1), \
290 .ss_idx = DT_ENUM_IDX_OR(node_id, adi_soft_start_ms, -1), \
291 .ilim_idx = DT_ENUM_IDX_OR(node_id, adi_ilim_milliamp, -1), \
Dregulator_npm1300.c653 .soft_start = DT_ENUM_IDX_OR(node_id, soft_start_microamp, UINT8_MAX), \
/Zephyr-Core-3.7.0/soc/ite/ec/common/
Dpinctrl_soc.h143 DT_ENUM_IDX_OR(node_id, drive_strength, IT8XXX2_DRIVE_DEFAULT)) \
/Zephyr-Core-3.7.0/drivers/pwm/
Dpwm_mcux.c255 .reload = DT_ENUM_IDX_OR(DT_DRV_INST(n), nxp_reload,\
/Zephyr-Core-3.7.0/drivers/mspi/
Dmspi_emul.c863 .op_mode = DT_ENUM_IDX_OR(n, op_mode, MSPI_OP_MODE_CONTROLLER), \
864 .duplex = DT_ENUM_IDX_OR(n, duplex, MSPI_HALF_DUPLEX), \
/Zephyr-Core-3.7.0/drivers/serial/
Duart_neorv32.c494 .parity = DT_ENUM_IDX_OR(node_id, parity, \
/Zephyr-Core-3.7.0/include/zephyr/
Ddevicetree.h885 #define DT_ENUM_IDX_OR(node_id, prop, default_idx_value) \ macro
3830 DT_ENUM_IDX_OR(DT_DRV_INST(inst), prop, default_idx_value)
/Zephyr-Core-3.7.0/subsys/ipc/ipc_service/backends/
Dipc_rpmsg_static_vrings.c812 .role = DT_ENUM_IDX_OR(DT_DRV_INST(i), role, ROLE_HOST), \
/Zephyr-Core-3.7.0/tests/lib/devicetree/api/src/
Dmain.c1984 zassert_equal(DT_ENUM_IDX_OR(DT_NODELABEL(test_enum_default_0), val, 2), in ZTEST()
1986 zassert_equal(DT_ENUM_IDX_OR(DT_NODELABEL(test_enum_default_1), val, 2), in ZTEST()
1989 zassert_equal(DT_ENUM_IDX_OR(DT_NODELABEL(test_enum_int_default_0), in ZTEST()
1992 zassert_equal(DT_ENUM_IDX_OR(DT_NODELABEL(test_enum_int_default_1), in ZTEST()
/Zephyr-Core-3.7.0/doc/releases/
Drelease-notes-2.5.rst777 - :c:macro:`DT_ENUM_IDX_OR`