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Searched refs:DMICLCTL_DCGD (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.7.0/soc/intel/intel_adsp/ace/include/ace15_mtpm/
Ddmic_regs_ace1x.h152 #define DMICLCTL_DCGD BIT(30) macro
/Zephyr-Core-3.7.0/soc/intel/intel_adsp/cavs/include/cavs25/
Ddmic_regs.h344 #define DMICLCTL_DCGD BIT(30) macro
/Zephyr-Core-3.7.0/drivers/dai/intel/dmic/
Ddmic.c290 sys_write32((sys_read32(dmic->shim_base + DMICLCTL_OFFSET) | DMICLCTL_DCGD), in dai_dmic_dis_clk_gating()
302 sys_write32((sys_read32(dmic->shim_base + DMICLCTL_OFFSET) & ~DMICLCTL_DCGD), in dai_dmic_en_clk_gating()