Searched refs:CONTROL (Results 1 – 18 of 18) sorted by relevance
/Zephyr-Core-3.7.0/arch/arm/core/cortex_m/ |
D | fpu.c | 22 uint32_t CONTROL = __get_CONTROL(); in z_arm_save_fp_context() local 24 if (CONTROL & CONTROL_FPCA_Msk) { in z_arm_save_fp_context() 36 __set_CONTROL(CONTROL & ~CONTROL_FPCA_Msk); in z_arm_save_fp_context()
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D | reset.S | 81 msr CONTROL, r0 153 mrs r0, CONTROL 156 msr CONTROL, r0
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D | swap_helper.S | 175 mrs r3, CONTROL 177 msr CONTROL, r3 268 mrs r2, CONTROL 413 msr CONTROL, r2
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/Zephyr-Core-3.7.0/drivers/peci/ |
D | peci_mchp_xec.c | 162 regs->CONTROL = MCHP_PECI_CTRL_PD; in peci_xec_configure() 171 regs->CONTROL &= ~MCHP_PECI_CTRL_PD; in peci_xec_configure() 193 regs->CONTROL |= MCHP_PECI_CTRL_PD; in peci_xec_disable() 203 regs->CONTROL &= ~MCHP_PECI_CTRL_PD; in peci_xec_enable() 221 regs->CONTROL = MCHP_PECI_CTRL_PD | MCHP_PECI_CTRL_RST; in peci_xec_bus_recovery() 229 regs->CONTROL &= ~MCHP_PECI_CTRL_RST; in peci_xec_bus_recovery() 234 regs->CONTROL |= MCHP_PECI_CTRL_FRST; in peci_xec_bus_recovery() 255 regs->CONTROL &= ~MCHP_PECI_CTRL_FRST; in peci_xec_write() 278 regs->CONTROL |= MCHP_PECI_CTRL_TXEN; in peci_xec_write() 459 regs->CONTROL &= ~MCHP_PECI_CTRL_PD; in peci_xec_pm_action() [all …]
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D | peci_ite_it8xxx2.c | 69 #define CONTROL BIT(2) macro 201 peci_regs->HOCTLR |= (FIFOCLR|FCSERR_ABT|PECIHEN|CONTROL); in peci_it8xxx2_enable()
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/Zephyr-Core-3.7.0/drivers/sensor/microchip/mchp_tach_xec/ |
D | tach_mchp_xec.c | 65 tach->CONTROL >> MCHP_TACH_CTRL_COUNTER_POS; in tach_xec_sample_fetch() 139 tach->CONTROL |= MCHP_TACH_CTRL_EN; in tach_xec_pm_action() 144 if (tach->CONTROL & MCHP_TACH_CTRL_EN) { in tach_xec_pm_action() 146 data->control = tach->CONTROL; in tach_xec_pm_action() 147 tach->CONTROL &= (~MCHP_TACH_CTRL_EN); in tach_xec_pm_action() 172 tach->CONTROL = MCHP_TACH_CTRL_READ_MODE_100K_CLOCK | in tach_xec_init()
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/Zephyr-Core-3.7.0/arch/arm/core/ |
D | userspace.S | 260 mrs r3, CONTROL 272 mrs ip, CONTROL 278 msr CONTROL, ip 549 mrs r2, CONTROL 551 msr CONTROL, r2 564 mrs ip, CONTROL 566 msr CONTROL, ip
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/Zephyr-Core-3.7.0/soc/microchip/mec/mec172x/ |
D | device_power.c | 255 adc0->CONTROL &= ~(MCHP_ADC_CTRL_ACTV); in deep_sleep_save_blocks() 261 ds_ctx.peci_info.peci_ctrl = peci->CONTROL; in deep_sleep_save_blocks() 314 adc0->CONTROL |= MCHP_ADC_CTRL_ACTV; in deep_sleep_restore_blocks() 321 peci->CONTROL = ds_ctx.peci_info.peci_ctrl; in deep_sleep_restore_blocks()
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/Zephyr-Core-3.7.0/soc/microchip/mec/common/reg/ |
D | mec_tach.h | 85 volatile uint32_t CONTROL; member
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D | mec_adc.h | 129 volatile uint32_t CONTROL; member
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D | mec_peci.h | 122 volatile uint8_t CONTROL; member
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/Zephyr-Core-3.7.0/drivers/entropy/ |
D | entropy_gecko_trng.c | 139 TRNG0->CONTROL = TRNG_CONTROL_ENABLE; in entropy_gecko_trng_init()
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/Zephyr-Core-3.7.0/boards/pine64/pinetime_devkit0/doc/ |
D | index.rst | 98 | P0.24 | 3V3 POWER CONTROL | OUT |
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/Zephyr-Core-3.7.0/drivers/usb/device/ |
D | usb_dc_kinetis.c | 234 USB0->CONTROL = USB_CONTROL_DPPULLUPNONOTG_MASK; in usb_dc_attach() 244 USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; in usb_dc_detach()
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/Zephyr-Core-3.7.0/scripts/ci/ |
D | pylintrc | 32 [MESSAGES CONTROL]
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/Zephyr-Core-3.7.0/drivers/usb/udc/ |
D | udc_kinetis.c | 944 base->CONTROL = USB_CONTROL_DPPULLUPNONOTG_MASK; in usbfsotg_enable() 956 base->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; in usbfsotg_disable()
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/Zephyr-Core-3.7.0/drivers/flash/ |
D | flash_cadence_nand_ll.c | 379 sys_set_bit(CNF_DI(base_address, CONTROL), CNF_DI_PAR_EN); in cdns_nand_init() 385 sys_set_bit(CNF_DI(base_address, CONTROL), CNF_DI_CRC_EN); in cdns_nand_init()
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/Zephyr-Core-3.7.0/doc/hardware/arch/ |
D | arm_cortex_m.rst | 385 * modify CONTROL register to switch to privileged mode 390 user's original PSP and PSPLIM and switch the CONTROL register back to unprivileged mode
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