CLKMGR_PLLGLOB_DREFCLKDIV (reference) in projects: Zephyr-Core-3.7.0

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Searched refs:CLKMGR_PLLGLOB_DREFCLKDIV (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.7.0/drivers/clock_control/
D	clock_control_agilex5_ll.h	`97 #define CLKMGR_PLLGLOB_DREFCLKDIV(x) (((x) & 0x00003000) >> 12) macro`
/Zephyr-Core-3.7.0/include/zephyr/drivers/clock_control/
D	clock_agilex_ll.h	`113 #define CLKMGR_PLLGLOB_DREFCLKDIV(x) (((x) & 0x00003000) >> 12) macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
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