Searched refs:vco_input_range (Results 1 – 4 of 4) sorted by relevance
| /Zephyr-Core-3.6.0/drivers/clock_control/ |
| D | clock_stm32_ll_h5.c | 368 static uint32_t get_vco_output_range(uint32_t vco_input_range) in get_vco_output_range() argument
370 if (vco_input_range == LL_RCC_PLLINPUTRANGE_1_2) { in get_vco_output_range()
418 uint32_t vco_input_range; in set_up_plls() local
449 r = get_vco_input_range(STM32_PLL_M_DIVISOR, &vco_input_range, PLL1_ID); in set_up_plls()
454 vco_output_range = get_vco_output_range(vco_input_range); in set_up_plls()
459 LL_RCC_PLL1_SetVCOInputRange(vco_input_range); in set_up_plls()
502 r = get_vco_input_range(STM32_PLL2_M_DIVISOR, &vco_input_range, PLL2_ID); in set_up_plls()
507 vco_output_range = get_vco_output_range(vco_input_range); in set_up_plls()
512 LL_RCC_PLL2_SetVCOInputRange(vco_input_range); in set_up_plls()
556 r = get_vco_input_range(STM32_PLL3_M_DIVISOR, &vco_input_range, PLL3_ID); in set_up_plls()
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| D | clock_stm32_ll_h7.c | 321 static uint32_t get_vco_output_range(uint32_t vco_input_range) in get_vco_output_range() argument
323 if (vco_input_range == LL_RCC_PLLINPUTRANGE_1_2) { in get_vco_output_range()
670 uint32_t vco_input_range; in set_up_plls() local
704 r = get_vco_input_range(STM32_PLL_M_DIVISOR, &vco_input_range); in set_up_plls()
709 vco_output_range = get_vco_output_range(vco_input_range); in set_up_plls()
713 LL_RCC_PLL1_SetVCOInputRange(vco_input_range); in set_up_plls()
743 r = get_vco_input_range(STM32_PLL2_M_DIVISOR, &vco_input_range); in set_up_plls()
748 vco_output_range = get_vco_output_range(vco_input_range); in set_up_plls()
752 LL_RCC_PLL2_SetVCOInputRange(vco_input_range); in set_up_plls()
781 r = get_vco_input_range(STM32_PLL3_M_DIVISOR, &vco_input_range); in set_up_plls()
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| D | clock_stm32_ll_u5.c | 472 uint32_t vco_input_range; in set_up_plls() local
509 r = get_vco_input_range(STM32_PLL_M_DIVISOR, &vco_input_range, PLL1_ID); in set_up_plls()
517 LL_RCC_PLL1_SetVCOInputRange(vco_input_range); in set_up_plls()
564 r = get_vco_input_range(STM32_PLL2_M_DIVISOR, &vco_input_range, PLL2_ID); in set_up_plls()
571 LL_RCC_PLL2_SetVCOInputRange(vco_input_range); in set_up_plls()
616 r = get_vco_input_range(STM32_PLL3_M_DIVISOR, &vco_input_range, PLL3_ID); in set_up_plls()
623 LL_RCC_PLL3_SetVCOInputRange(vco_input_range); in set_up_plls()
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| D | clock_stm32_ll_wba.c | 351 uint32_t vco_input_range; in set_up_plls() local
380 r = get_vco_input_range(STM32_PLL_M_DIVISOR, &vco_input_range); in set_up_plls()
387 LL_RCC_PLL1_SetVCOInputRange(vco_input_range); in set_up_plls()
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