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/Zephyr-Core-3.6.0/samples/drivers/espi/boards/
Dmec172xevb_assy6906.overlay24 reset-state = "1";
25 reset-source = "ESPI_RESET";
30 reset-state = "1";
31 reset-source = "ESPI_RESET";
36 reset-state = "1";
37 reset-source = "ESPI_RESET";
42 reset-state = "1";
43 reset-source = "ESPI_RESET";
/Zephyr-Core-3.6.0/dts/arm64/intel/
Dintel_socfpga_agilex5.dtsi10 #include <zephyr/dt-bindings/reset/intel_socfpga_reset.h>
108 resets = <&reset RSTMGR_UART0_RSTLINE>;
112 reset: reset-controller@10D11000 { label
113 compatible = "intel,socfpga-reset";
116 #reset-cells = <1>;
127 resets = <&reset RSTMGR_SDMMC_RSTLINE>,
128 <&reset RSTMGR_SDMMCECC_RSTLINE>,
129 <&reset RSTMGR_SOFTPHY_RSTLINE>;
140 resets = <&reset RSTMGR_SPTIMER0_RSTLINE>;
151 resets = <&reset RSTMGR_SPTIMER1_RSTLINE>;
[all …]
/Zephyr-Core-3.6.0/doc/hardware/peripherals/
Dreset.rst9 Reset controllers are units that control the reset signals to multiple
10 peripherals. The reset controller API allows peripheral drivers to request
11 control over their reset input signals, including the ability to assert,
12 deassert and toggle those signals. Also, the reset status of the reset input
16 in most cases we want to toggle the reset signals.
/Zephyr-Core-3.6.0/soc/arm/nxp_s32/
DKconfig18 If the value of this option is 0, the Functional reset escalation
20 resets that causes a Destructive reset, if the FRET register isn't
22 Default to maximum threshold (hardware reset value).
29 If the value of this field is 0, the Destructive reset escalation
31 resets which keeps the chip in the reset state until the next power-on
32 reset triggers a new reset sequence, if the DRET register isn't
34 Default to disabled (hardware reset value).
/Zephyr-Core-3.6.0/drivers/watchdog/
DKconfig.smartbond14 bool "NMI pre-reset interrupt enable"
20 reset at <= -16. Timer can be frozen/resumed using
24 reset at value 0 and can not be frozen by Software.
26 only be reset with a WDOG (SYS) reset or SW reset.
/Zephyr-Core-3.6.0/boards/arm/stm32f7508_dk/support/
Dopenocd.cfg5 reset halt
14 # Event reset-init already uses the maximum speed however adapter speed
15 # inherited from stm32f7x.cfg for reset-start defaults to 2000 kHz, so
17 $_TARGETNAME configure -event reset-start {
/Zephyr-Core-3.6.0/scripts/west_commands/runners/
Dezflashcli.py13 def __init__(self, cfg, tool, sn, erase=False, reset=True): argument
20 self.reset = bool(reset)
28 return RunnerCaps(commands={'flash'}, erase=True, reset=True)
38 parser.set_defaults(reset=True)
78 if self.reset:
Desp32.py19 app_address, erase=False, reset=False, baud=921600, argument
27 self.reset = bool(reset)
47 return RunnerCaps(commands={'flash'}, erase=True, reset=True)
82 parser.set_defaults(reset=True)
95 app_address=args.esp_app_address, erase=args.erase, reset=args.reset,
118 if self.reset:
Dstm32flash.py21 serial_mode='8e1', reset=False, verify=False): argument
31 self.reset = reset
40 return RunnerCaps(commands={'flash'}, reset=True)
78 parser.set_defaults(reset=False)
85 serial_mode=args.serial_mode, reset=args.reset, verify=args.verify)
135 if self.reset:
/Zephyr-Core-3.6.0/tests/drivers/build_all/modem/
Duart.dtsi11 mdm-reset-gpios = <&test_gpio 0 0>;
26 mdm-reset-gpios = <&test_gpio 0 0>;
34 mdm-reset-gpios = <&test_gpio 0 0>;
47 mdm-reset-gpios = <&test_gpio 0 0>;
53 mdm-reset-gpios = <&test_gpio 0 0>;
64 mdm-reset-gpios = <&test_gpio 0 0>;
/Zephyr-Core-3.6.0/soc/arm/atmel_sam0/common/
Dsoc_samr3x_radio_off.c14 const struct gpio_dt_spec reset = GPIO_DT_SPEC_GET(DT_NODELABEL(lora), reset_gpios); in radio_off_setup() local
17 if (!gpio_is_ready_dt(&reset) || !gpio_is_ready_dt(&cs)) { in radio_off_setup()
21 ret = gpio_pin_configure_dt(&reset, GPIO_OUTPUT_ACTIVE); in radio_off_setup()
/Zephyr-Core-3.6.0/boards/arm/stm32f746g_disco/support/
Dopenocd.cfg5 reset halt
18 # Event reset-init already uses the maximum speed however adapter speed
19 # inherited from stm32f7x.cfg for reset-start defaults to 2000 kHz, so
21 $_TARGETNAME configure -event reset-start {
/Zephyr-Core-3.6.0/drivers/bbram/
DKconfig.stm3215 powered-on by VBAT when the VDD power is switched off. They are not reset
16 by system reset or when the device wakes up from Standby mode. They are
17 reset by a backup domain reset.
/Zephyr-Core-3.6.0/tests/drivers/build_all/dac/
Dapp.overlay155 reset-gpios = <&test_gpio 0 0>;
163 reset-gpios = <&test_gpio 0 0>;
171 reset-gpios = <&test_gpio 0 0>;
179 reset-gpios = <&test_gpio 0 0>;
187 reset-gpios = <&test_gpio 0 0>;
195 reset-gpios = <&test_gpio 0 0>;
203 reset-gpios = <&test_gpio 0 0>;
211 reset-gpios = <&test_gpio 0 0>;
219 reset-gpios = <&test_gpio 0 0>;
227 reset-gpios = <&test_gpio 0 0>;
[all …]
/Zephyr-Core-3.6.0/boards/arm/nucleo_u575zi_q/
Dboard.cmake1 board_runner_args(stm32cubeprogrammer "--erase" "--port=swd" "--reset-mode=hw")
2 board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
10 board_runner_args(jlink "--device=STM32U575ZI" "--reset-after-load")
/Zephyr-Core-3.6.0/drivers/reset/
DKconfig13 information about reset controller device. The typical use-case is
14 for some other node's drivers to acquire a reference to the reset
15 controller node together with some reset information.
23 This option controls the priority of the reset controller device
DKconfig.aspeed5 bool "ASPEED reset driver"
9 This option enables the reset driver for ASPEED AST10X0 series SOC.
/Zephyr-Core-3.6.0/boards/arm/lora_e5_mini/
Dboard.cmake5 board_runner_args(pyocd "--flash-opt=-O connect_mode=under-reset")
6 board_runner_args(jlink "--device=STM32WLE5JC" "--speed=4000" "--reset-after-load")
7 board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
/Zephyr-Core-3.6.0/boards/arm/lora_e5_dev_board/
Dboard.cmake5 board_runner_args(pyocd "--flash-opt=-O connect_mode=under-reset")
6 board_runner_args(jlink "--device=STM32WLE5JC" "--speed=4000" "--reset-after-load")
7 board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
/Zephyr-Core-3.6.0/dts/arm/rpi_pico/
Drp2040.dtsi202 reset: reset-controller@4000c000 { label
203 compatible = "raspberrypi,pico-reset";
207 #reset-cells = <1>;
246 resets = <&reset RPI_PICO_RESETS_RESET_UART0>;
256 resets = <&reset RPI_PICO_RESETS_RESET_UART1>;
268 resets = <&reset RPI_PICO_RESETS_RESET_SPI0>;
279 resets = <&reset RPI_PICO_RESETS_RESET_SPI1>;
289 resets = <&reset RPI_PICO_RESETS_RESET_ADC>;
302 resets = <&reset RPI_PICO_RESETS_RESET_I2C0>;
314 resets = <&reset RPI_PICO_RESETS_RESET_I2C0>;
[all …]
/Zephyr-Core-3.6.0/drivers/mipi_dbi/
Dmipi_dbi_spi.c22 const struct gpio_dt_spec reset; member
250 if (!mipi_dbi_has_pin(&config->reset)) { in mipi_dbi_spi_reset()
254 ret = gpio_pin_set_dt(&config->reset, 1); in mipi_dbi_spi_reset()
259 return gpio_pin_set_dt(&config->reset, 0); in mipi_dbi_spi_reset()
283 if (mipi_dbi_has_pin(&config->reset)) { in mipi_dbi_spi_init()
284 if (!gpio_is_ready_dt(&config->reset)) { in mipi_dbi_spi_init()
287 ret = gpio_pin_configure_dt(&config->reset, GPIO_OUTPUT_INACTIVE); in mipi_dbi_spi_init()
298 .reset = mipi_dbi_spi_reset,
312 .reset = GPIO_DT_SPEC_INST_GET_OR(n, reset_gpios, {}), \
/Zephyr-Core-3.6.0/drivers/misc/pio_rpi_pico/
Dpio_rpi_pico.c20 const struct reset_dt_spec reset; member
54 ret = reset_line_toggle_dt(&config->reset); in pio_rpi_pico_init()
67 .reset = RESET_DT_SPEC_INST_GET(idx), \
/Zephyr-Core-3.6.0/boards/arm/nucleo_wl55jc/support/
Dopenocd.cfg7 # Debug compatible reset configuration (default)
10 # Sleep mode compatible reset configuration (stock firmware compatible)
/Zephyr-Core-3.6.0/soc/riscv/openisa_rv32m1/
Dvector_table.ld10 * for MCUboot support, so .reset.* and .exception.*
19 * set with the value of _vector_start in the reset handler.
27 KEEP(*(.reset.*))
/Zephyr-Core-3.6.0/boards/arm/lpcxpresso54114/
Dboard.cmake8 board_runner_args(jlink "--device=LPC54114J256_M4" "--reset-after-load")
10 board_runner_args(jlink "--device=LPC54114J256_M0" "--reset-after-load")

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