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Searched refs:ref_clk (Results 1 – 5 of 5) sorted by relevance

/Zephyr-Core-3.6.0/drivers/clock_control/
Dclock_agilex_ll.c27 uint32_t arefclkdiv, ref_clk; in get_ref_clk() local
33 ref_clk = mmio_read_32(scr_reg); in get_ref_clk()
36 ref_clk = CLKMGR_INTOSC_HZ; in get_ref_clk()
40 ref_clk = mmio_read_32(scr_reg); in get_ref_clk()
43 ref_clk = 0; in get_ref_clk()
48 ref_clk /= arefclkdiv; in get_ref_clk()
50 return ref_clk; in get_ref_clk()
56 uint32_t clk_psrc, mdiv, ref_clk; in get_clk_freq() local
76 ref_clk = get_ref_clk(mmio_read_32(pllglob_reg)); in get_clk_freq()
78 ref_clk *= mdiv; in get_clk_freq()
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Dclock_control_agilex5_ll.c45 uint32_t arefclkdiv, ref_clk; in get_ref_clk() local
56 ref_clk = sys_read32(scr_reg); in get_ref_clk()
60 ref_clk = CLKMGR_INTOSC_HZ; in get_ref_clk()
65 ref_clk = sys_read32(scr_reg); in get_ref_clk()
69 ref_clk = 0; in get_ref_clk()
76 ref_clk /= arefclkdiv; in get_ref_clk()
78 return ref_clk; in get_ref_clk()
84 uint32_t clk_psrc, mdiv, ref_clk; in get_clk_freq() local
106 ref_clk = get_ref_clk(sys_read32(pllglob_reg)); in get_clk_freq()
108 ref_clk *= mdiv; in get_clk_freq()
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/Zephyr-Core-3.6.0/drivers/watchdog/
Dwdt_rpi_pico.c40 uint32_t ref_clk; in wdt_rpi_pico_setup() local
87 err = clock_control_get_rate(config->clk_dev, config->clk_id, &ref_clk); in wdt_rpi_pico_setup()
92 watchdog_hw->tick = (ref_clk / RPI_PICO_CLK_REF_FREQ_WDT_TICK_DIVISOR) | in wdt_rpi_pico_setup()
/Zephyr-Core-3.6.0/drivers/mipi_dsi/
Ddsi_mcux.c56 static uint32_t dsi_mcux_best_clock(uint32_t ref_clk, uint32_t target_freq) in dsi_mcux_best_clock() argument
96 refclk_cn_freq = ref_clk / cn; in dsi_mcux_best_clock()
Ddsi_stm32.c41 struct stm32_pclken ref_clk; member
163 ret = clock_control_get_rate(config->rcc, (clock_control_subsys_t)&config->ref_clk, in mipi_dsi_stm32_host_init()
465 .ref_clk = { \