Home
last modified time | relevance | path

Searched refs:rail (Results 1 – 14 of 14) sorted by relevance

/Zephyr-Core-3.6.0/boards/arm/thingy52_nrf52832/
DKconfig9 int "CCS_VDD power rail init priority"
13 Initialization priority for the CCS_VDD power rail. This powers the
/Zephyr-Core-3.6.0/samples/drivers/led_xec/
DREADME.rst53 to the VBAT rail via a 100K pull-up. Requires VBAT power rail is connected
62 to the VBAT rail via a 100K pull-up. Requires VBAT power rail is connected
/Zephyr-Core-3.6.0/boards/arm/degu_evk/
Ddegu_evk_defconfig21 # required to enable 3V3 power rail and Vin1 monitor
/Zephyr-Core-3.6.0/boards/arm/circuitdojo_feather_nrf9160/
Dcircuitdojo_feather_nrf9160_defconfig26 # required to enable 3V3 power rail
Dcircuitdojo_feather_nrf9160_ns_defconfig29 # required to enable 3V3 power rail
/Zephyr-Core-3.6.0/drivers/power_domain/
DKconfig59 bool "GPIO monitor for sensing power on rail"
/Zephyr-Core-3.6.0/drivers/regulator/
Dregulator_da1469x.c160 enum da1469x_rail rail; member
364 if ((config->rail == V30) && in regulator_da1469x_init()
/Zephyr-Core-3.6.0/boards/arm/adafruit_qt_py_rp2040/
Dadafruit_qt_py_rp2040.dts77 * rail to save on power. This will enable the LED on board initialization.
/Zephyr-Core-3.6.0/soc/arm/microchip_mec/mec1501/
DKconfig.soc30 bool "VTR3 power rail is tied to 1.8V"
/Zephyr-Core-3.6.0/boards/arm/lora_e5_dev_board/
Dlora_e5_dev_board.dts58 * PWR rail for SPI-flash, Temp-Sensor, RS-485 Transceiver,
/Zephyr-Core-3.6.0/boards/arm/nucleo_g474re/doc/
Dindex.rst70 - 4x ultra-fast rail-to-rail analog comparators
/Zephyr-Core-3.6.0/boards/arm/nucleo_g431rb/doc/
Dindex.rst70 - 4x ultra-fast rail-to-rail analog comparators
/Zephyr-Core-3.6.0/samples/boards/mimxrt595_evk_cm33/system_off/
DREADME.rst65 regulator driving the VDDCORE rail at 1.0V. However, the MCU will not be
/Zephyr-Core-3.6.0/boards/arm/mec1501modular_assy6885/doc/
Dindex.rst185 ``JP20 2-3`` is required so all GPIOs powered by VTR3 rail worked at 1.8V.