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Searched refs:psc (Results 1 – 7 of 7) sorted by relevance

/Zephyr-Core-3.6.0/drivers/clock_control/
Dclock_control_gd32.c101 uint8_t psc; in clock_control_gd32_get_rate() local
113 psc = (cfg & RCU_CFG0_AHBPSC_MSK) >> RCU_CFG0_AHBPSC_POS; in clock_control_gd32_get_rate()
114 *rate = CPU_FREQ >> ahb_exp[psc]; in clock_control_gd32_get_rate()
122 psc = (cfg & RCU_CFG0_APB1PSC_MSK) >> RCU_CFG0_APB1PSC_POS; in clock_control_gd32_get_rate()
123 *rate = CPU_FREQ >> apb1_exp[psc]; in clock_control_gd32_get_rate()
126 psc = (cfg & RCU_CFG0_APB2PSC_MSK) >> RCU_CFG0_APB2PSC_POS; in clock_control_gd32_get_rate()
127 *rate = CPU_FREQ >> apb2_exp[psc]; in clock_control_gd32_get_rate()
156 if (psc <= 2U) { in clock_control_gd32_get_rate()
163 if (psc <= 4U) { in clock_control_gd32_get_rate()
176 if (psc != 1U) { in clock_control_gd32_get_rate()
/Zephyr-Core-3.6.0/drivers/watchdog/
Dwdt_fwdgt_gd32.c28 #define IS_VALID_FWDGT_PRESCALER(psc) \ argument
29 (((psc) == FWDGT_PSC_DIV4) || ((psc) == FWDGT_PSC_DIV8) || \
30 ((psc) == FWDGT_PSC_DIV16) || ((psc) == FWDGT_PSC_DIV32) || \
31 ((psc) == FWDGT_PSC_DIV64) || ((psc) == FWDGT_PSC_DIV128) || \
32 ((psc) == FWDGT_PSC_DIV256))
/Zephyr-Core-3.6.0/boards/arm/stm32g081b_eval/
Dstm32g081b_eval.dts171 * HSI ---->| /psc |--------->| /hbit |--------------->| trans_cnt |
185 psc-ucpdclk = <1>;
202 * HSI ---->| /psc |--------->| /hbit |--------------->| trans_cnt |
216 psc-ucpdclk = <1>;
/Zephyr-Core-3.6.0/boards/arm/b_g474e_dpow1/
Db_g474e_dpow1.dts165 * HSI ---->| /psc |--------->| /hbit |--------------->| trans_cnt |
179 psc-ucpdclk = <1>;
/Zephyr-Core-3.6.0/boards/arm/stm32g071b_disco/
Dstm32g071b_disco.dts167 * HSI ---->| /psc |--------->| /hbit |--------------->| trans_cnt |
181 psc-ucpdclk = <1>;
/Zephyr-Core-3.6.0/boards/arm/weact_stm32g431_core/
Dweact_stm32g431_core.dts174 psc-ucpdclk = <1>;
/Zephyr-Core-3.6.0/boards/arm/google_twinkie_v2/
Dgoogle_twinkie_v2.dts182 psc-ucpdclk = <1>;