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Searched refs:pllp (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.6.0/drivers/clock_control/
Dclock_stm32_ll_common.h22 #define pllp(v) z_pllp(v) macro
Dclock_stm32f2_f4_f7.c65 pllp(STM32_PLL_P_DIVISOR)); in config_pll_sysclock()
Dclock_stm32_ll_common.c518 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLP, pllp(STM32_PLL_P_DIVISOR)); in set_up_plls()