| /Zephyr-Core-3.6.0/drivers/pinctrl/ |
| D | pinctrl_xmc4xxx.c | 20 XMC_GPIO_CONFIG_t pin_cfg = {0}; in pinctrl_configure_pin() local
31 pin_cfg.mode = XMC_GPIO_MODE_INPUT_PULL_DOWN; in pinctrl_configure_pin()
35 pin_cfg.mode = XMC_GPIO_MODE_INPUT_PULL_UP; in pinctrl_configure_pin()
39 pin_cfg.mode |= 0x4; in pinctrl_configure_pin()
43 pin_cfg.mode = XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN; in pinctrl_configure_pin()
47 pin_cfg.mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL; in pinctrl_configure_pin()
51 pin_cfg.mode |= alt_fun << PORT0_IOCR0_PC0_Pos; in pinctrl_configure_pin()
55 pin_cfg.output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH; in pinctrl_configure_pin()
60 pin_cfg.output_level = XMC_GPIO_OUTPUT_LEVEL_LOW; in pinctrl_configure_pin()
64 pin_cfg.output_strength = XMC4XXX_PINMUX_GET_DRIVE(pinmux); in pinctrl_configure_pin()
[all …]
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| D | pinctrl_esp32.c | 167 static int esp32_pin_configure(const uint32_t pin_mux, const uint32_t pin_cfg) in esp32_pin_configure() argument
185 switch (ESP32_PIN_BIAS(pin_cfg)) { in esp32_pin_configure()
196 switch (ESP32_PIN_DRV(pin_cfg)) { in esp32_pin_configure()
219 switch (ESP32_PIN_MODE_OUT(pin_cfg)) { in esp32_pin_configure()
230 switch (ESP32_PIN_EN_DIR(pin_cfg)) { in esp32_pin_configure()
285 uint32_t pin_mux, pin_cfg; in pinctrl_configure_pins() local
292 pin_cfg = pins[i].pincfg; in pinctrl_configure_pins()
294 ret = esp32_pin_configure(pin_mux, pin_cfg); in pinctrl_configure_pins()
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| /Zephyr-Core-3.6.0/tests/drivers/input/gpio_keys/src/ |
| D | main.c | 27 const struct gpio_keys_pin_config *pin_cfg; member
55 const struct gpio_keys_pin_config *pin_cfg = &config->pin_cfg[BUTTON_0_IDX]; in ZTEST() local
56 const struct gpio_dt_spec *spec = &pin_cfg->spec; in ZTEST()
70 zassert_equal(last_code, pin_cfg->zephyr_code); in ZTEST()
82 zassert_equal(last_code, pin_cfg->zephyr_code); in ZTEST()
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| /Zephyr-Core-3.6.0/drivers/input/ |
| D | input_gpio_keys.c | 43 const struct gpio_keys_pin_config *pin_cfg; member
61 const struct gpio_keys_pin_config *pin_cfg = &cfg->pin_cfg[key_index]; in gpio_keys_poll_pin() local
65 new_pressed = gpio_pin_get(pin_cfg->spec.port, pin_cfg->spec.pin); in gpio_keys_poll_pin()
74 pin_cfg->zephyr_code); in gpio_keys_poll_pin()
75 input_report_key(dev, pin_cfg->zephyr_code, new_pressed, true, K_FOREVER); in gpio_keys_poll_pin()
160 const struct gpio_dt_spec *gpio = &cfg->pin_cfg[i].spec; in gpio_keys_init()
180 ret = gpio_keys_interrupt_configure(&cfg->pin_cfg[i].spec, in gpio_keys_init()
182 cfg->pin_cfg[i].zephyr_code); in gpio_keys_init()
230 const struct gpio_dt_spec *gpio = &cfg->pin_cfg[i].spec; in gpio_keys_pm_action()
280 .pin_cfg = gpio_keys_pin_config_##i, \
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| /Zephyr-Core-3.6.0/drivers/gpio/ |
| D | gpio_imx.c | 47 struct pinctrl_soc_pin pin_cfg; in imx_gpio_configure() local
85 memcpy(&pin_cfg.pinmux, &config->pin_muxes[pin], sizeof(pin_cfg.pinmux)); in imx_gpio_configure()
87 pin_cfg.pin_ctrl_flags = reg; in imx_gpio_configure()
88 pinctrl_configure_pins(&pin_cfg, 1, PINCTRL_REG_NONE); in imx_gpio_configure()
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| D | gpio_mcux_rgpio.c | 57 struct pinctrl_soc_pin pin_cfg; in mcux_rgpio_configure() local
105 memcpy(&pin_cfg.pinmux, &config->pin_muxes[cfg_idx], sizeof(pin_cfg)); in mcux_rgpio_configure()
107 pin_cfg.pin_ctrl_flags = reg; in mcux_rgpio_configure()
108 pinctrl_configure_pins(&pin_cfg, 1, PINCTRL_REG_NONE); in mcux_rgpio_configure()
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| D | gpio_stm32.c | 96 static int gpio_stm32_pincfg_to_flags(struct gpio_stm32_pin pin_cfg, in gpio_stm32_pincfg_to_flags() argument
101 if (pin_cfg.mode == LL_GPIO_MODE_OUTPUT) { in gpio_stm32_pincfg_to_flags()
103 if (pin_cfg.type == LL_GPIO_OUTPUT_OPENDRAIN) { in gpio_stm32_pincfg_to_flags()
106 } else if (pin_cfg.mode == LL_GPIO_MODE_INPUT) { in gpio_stm32_pincfg_to_flags()
109 } else if (pin_cfg.mode == LL_GPIO_MODE_FLOATING) { in gpio_stm32_pincfg_to_flags()
116 if (pin_cfg.pupd == LL_GPIO_PULL_UP) { in gpio_stm32_pincfg_to_flags()
118 } else if (pin_cfg.pupd == LL_GPIO_PULL_DOWN) { in gpio_stm32_pincfg_to_flags()
122 if (pin_cfg.out_state != 0) { in gpio_stm32_pincfg_to_flags()
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| D | gpio_mcux_igpio.c | 49 struct pinctrl_soc_pin pin_cfg; in mcux_igpio_configure() local
189 memcpy(&pin_cfg.pinmux, &config->pin_muxes[cfg_idx], sizeof(pin_cfg.pinmux)); in mcux_igpio_configure()
191 pin_cfg.pin_ctrl_flags = reg; in mcux_igpio_configure()
192 pinctrl_configure_pins(&pin_cfg, 1, PINCTRL_REG_NONE); in mcux_igpio_configure()
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| /Zephyr-Core-3.6.0/drivers/adc/ |
| D | adc_nxp_s32_adc_sar.c | 32 const struct pinctrl_dev_config *pin_cfg; member
56 if (config->pin_cfg) { in adc_nxp_s32_init()
57 if (pinctrl_apply_state(config->pin_cfg, PINCTRL_STATE_DEFAULT)) { in adc_nxp_s32_init()
434 .pin_cfg = COND_CODE_1(DT_INST_NUM_PINCTRL_STATES(n), \
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| /Zephyr-Core-3.6.0/drivers/spi/ |
| D | spi_rpi_pico_pio.c | 30 const struct pinctrl_dev_config *pin_cfg; member
344 rc = pinctrl_apply_state(dev_cfg->pin_cfg, PINCTRL_STATE_DEFAULT); in spi_pico_pio_init()
365 .pin_cfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
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| /Zephyr-Core-3.6.0/drivers/can/ |
| D | can_nxp_s32_canxl.c | 104 const struct pinctrl_dev_config *pin_cfg; member
965 err = pinctrl_apply_state(config->pin_cfg, PINCTRL_STATE_DEFAULT);
1242 .pin_cfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
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