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Searched refs:mmio_read_32 (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.6.0/drivers/clock_control/
Dclock_agilex_ll.c20 #define mmio_read_32(addr) sys_read32((addr)) macro
33 ref_clk = mmio_read_32(scr_reg); in get_ref_clk()
40 ref_clk = mmio_read_32(scr_reg); in get_ref_clk()
59 clk_psrc = mmio_read_32(CLKMGR_MAINPLL + psrc_reg); in get_clk_freq()
76 ref_clk = get_ref_clk(mmio_read_32(pllglob_reg)); in get_clk_freq()
77 mdiv = CLKMGR_PLLM_MDIV(mmio_read_32(pllm_reg)); in get_clk_freq()
80 pllc_div = mmio_read_32(pllc_reg) & 0x7ff; in get_clk_freq()
123 data32 = mmio_read_32(CLKMGR_MAINPLL + CLKMGR_MAINPLL_NOCDIV); in get_uart_clk()
139 data32 = mmio_read_32(CLKMGR_ALTERA + CLKMGR_ALTERA_SDMMCCTR); in get_mmc_clk()