Searched refs:interrupt_mask (Results 1 – 6 of 6) sorted by relevance
| /Zephyr-Core-3.6.0/drivers/counter/ |
| D | counter_mcux_qtmr.c | 42 qtmr_status_flags_t interrupt_mask; member
66 data->interrupt_mask &= ~kQTMR_Compare1InterruptEnable; in mcux_qtmr_timer_handler()
96 if ((channel_status & data->interrupt_mask) != 0) { in mcux_qtmr_isr()
180 data->interrupt_mask |= kQTMR_Compare1InterruptEnable; in mcux_qtmr_set_alarm()
181 QTMR_EnableInterrupts(config->base, config->channel, data->interrupt_mask); in mcux_qtmr_set_alarm()
196 QTMR_DisableInterrupts(config->base, config->channel, data->interrupt_mask); in mcux_qtmr_cancel_alarm()
197 data->interrupt_mask &= ~kQTMR_Compare1InterruptEnable; in mcux_qtmr_cancel_alarm()
236 data->interrupt_mask |= kQTMR_OverflowInterruptEnable; in mcux_qtmr_set_top_value()
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| /Zephyr-Core-3.6.0/drivers/gpio/ |
| D | gpio_pca953x.c | 72 int interrupt_mask; member
456 if (cfg->interrupt_mask > -1) { in gpio_pca953x_init()
458 cfg->interrupt_mask); in gpio_pca953x_init()
489 .interrupt_mask = DT_INST_PROP_OR(n, interrupt_mask, -1), \
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| D | gpio_sx1509b.c | 52 uint16_t interrupt_mask; /* 0x12 */ member
507 irq->interrupt_mask |= BIT(pin); in pin_interrupt_configure()
509 irq->interrupt_mask &= ~BIT(pin); in pin_interrupt_configure()
523 irq_buf.irq.interrupt_mask = sys_cpu_to_be16(irq->interrupt_mask); in pin_interrupt_configure()
570 .interrupt_mask = ALL_PINS, in sx1509b_init()
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| D | gpio_pcal64xxa.c | 508 uint8_t interrupt_mask = triggers->masked; in pcal6408a_triggers_apply() local
516 rc = pcal64xxa_i2c_write(i2c, PCAL6408A_REG_INTERRUPT_MASK, (uint8_t)interrupt_mask); in pcal6408a_triggers_apply()
677 uint16_t interrupt_mask = triggers->masked; in pcal6416a_triggers_apply() local
691 rc = pcal64xxa_i2c_write(i2c, PCAL6416A_REG_INTERRUPT_MASK_0, (uint8_t)interrupt_mask); in pcal6416a_triggers_apply()
698 (uint8_t)(interrupt_mask >> 8)); in pcal6416a_triggers_apply()
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| /Zephyr-Core-3.6.0/drivers/ethernet/ |
| D | eth_cyclonev.c | 555 sys_read32(EMAC_DMAGRP_STATUS_ADDR(p->base_addr)) & p->interrupt_mask; in eth_cyclonev_isr()
855 uint32_t tmpreg = 0, interrupt_mask; in eth_cyclonev_probe() local
950 interrupt_mask = EMAC_DMA_INT_EN_NIE_SET_MSK | EMAC_DMA_INT_EN_RIE_SET_MSK | in eth_cyclonev_probe()
953 p->interrupt_mask = interrupt_mask; in eth_cyclonev_probe()
956 sys_write32(interrupt_mask, EMAC_DMAGRP_STATUS_ADDR(p->base_addr)); in eth_cyclonev_probe()
962 sys_set_bits(EMAC_DMA_INT_EN_ADDR(p->base_addr), interrupt_mask); in eth_cyclonev_probe()
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| D | eth_cyclonev_priv.h | 34 uint32_t interrupt_mask; member
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