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/Zephyr-Core-3.6.0/subsys/bluetooth/audio/
Dvocs_client.c53 struct bt_vocs_client *inst; in vocs_client_notify_handler() local
59 inst = lookup_vocs_by_handle(conn, handle); in vocs_client_notify_handler()
61 if (!inst) { in vocs_client_notify_handler()
70 if (handle == inst->state_handle) { in vocs_client_notify_handler()
71 if (length == sizeof(inst->state)) { in vocs_client_notify_handler()
72 memcpy(&inst->state, data, length); in vocs_client_notify_handler()
73 LOG_DBG("Inst %p: Offset %d, counter %u", inst, inst->state.offset, in vocs_client_notify_handler()
74 inst->state.change_counter); in vocs_client_notify_handler()
75 if (inst->cb && inst->cb->state) { in vocs_client_notify_handler()
76 inst->cb->state(&inst->vocs, 0, inst->state.offset); in vocs_client_notify_handler()
[all …]
Daics_client.c32 static int aics_client_common_control(uint8_t opcode, struct bt_aics *inst);
54 struct bt_aics *inst; in aics_client_notify_handler() local
62 inst = lookup_aics_by_handle(conn, handle); in aics_client_notify_handler()
64 if (!inst) { in aics_client_notify_handler()
73 if (handle == inst->cli.state_handle) { in aics_client_notify_handler()
76 LOG_DBG("Inst %p: Gain %d, mute %u, gain_mode %u, counter %u", inst, in aics_client_notify_handler()
79 inst->cli.change_counter = state->change_counter; in aics_client_notify_handler()
81 if (inst->cli.cb && inst->cli.cb->state) { in aics_client_notify_handler()
82 inst->cli.cb->state(inst, 0, state->gain, in aics_client_notify_handler()
87 } else if (handle == inst->cli.status_handle) { in aics_client_notify_handler()
[all …]
Dhas_client.c29 struct bt_has_client *inst = &clients[bt_conn_index(conn)]; in inst_by_conn() local
31 if (inst->conn == conn) { in inst_by_conn()
32 return inst; in inst_by_conn()
38 static void inst_cleanup(struct bt_has_client *inst) in inst_cleanup() argument
40 bt_conn_unref(inst->conn); in inst_cleanup()
42 (void)memset(inst, 0, sizeof(*inst)); in inst_cleanup()
45 static enum bt_has_capabilities get_capabilities(const struct bt_has_client *inst) in get_capabilities() argument
50 if (HANDLE_IS_VALID(inst->control_point_subscription.value_handle)) { in get_capabilities()
57 static void handle_read_preset_rsp(struct bt_has_client *inst, struct net_buf_simple *buf) in handle_read_preset_rsp() argument
64 LOG_DBG("conn %p buf %p", (void *)inst->conn, buf); in handle_read_preset_rsp()
[all …]
Daics.c115 struct bt_aics *inst = BT_AUDIO_CHRC_USER_DATA(attr); in read_aics_state() local
117 LOG_DBG("gain %d, mute %u, gain_mode %u, counter %u", inst->srv.state.gain, in read_aics_state()
118 inst->srv.state.mute, inst->srv.state.gain_mode, inst->srv.state.change_counter); in read_aics_state()
120 return bt_gatt_attr_read(conn, attr, buf, len, offset, &inst->srv.state, in read_aics_state()
121 sizeof(inst->srv.state)); in read_aics_state()
128 struct bt_aics *inst = BT_AUDIO_CHRC_USER_DATA(attr); in read_aics_gain_settings() local
130 LOG_DBG("units %u, min %d, max %d", inst->srv.gain_settings.units, in read_aics_gain_settings()
131 inst->srv.gain_settings.minimum, inst->srv.gain_settings.maximum); in read_aics_gain_settings()
134 &inst->srv.gain_settings, in read_aics_gain_settings()
135 sizeof(inst->srv.gain_settings)); in read_aics_gain_settings()
[all …]
Dvocs.c41 struct bt_vocs_server *inst = BT_AUDIO_CHRC_USER_DATA(attr); in read_offset_state() local
43 LOG_DBG("offset %d, counter %u", inst->state.offset, inst->state.change_counter); in read_offset_state()
44 return bt_gatt_attr_read(conn, attr, buf, len, offset, &inst->state, in read_offset_state()
45 sizeof(inst->state)); in read_offset_state()
67 static void notify_work_reschedule(struct bt_vocs_server *inst, enum bt_vocs_notify notify, in notify_work_reschedule() argument
72 atomic_set_bit(inst->notify, notify); in notify_work_reschedule()
74 err = k_work_reschedule(&inst->notify_work, K_NO_WAIT); in notify_work_reschedule()
81 static void notify(struct bt_vocs_server *inst, enum bt_vocs_notify notify, in notify() argument
86 err = bt_gatt_notify_uuid(NULL, uuid, inst->service_p->attrs, data, len); in notify()
88 notify_work_reschedule(inst, notify, K_USEC(BT_AUDIO_NOTIFY_RETRY_DELAY_US)); in notify()
[all …]
Dtbs.c55 struct service_inst inst; member
66 struct service_inst inst; member
88 static bool inst_is_gtbs(const struct service_inst *inst) in inst_is_gtbs() argument
90 return IS_ENABLED(CONFIG_BT_GTBS) && inst == &gtbs_inst.inst; in inst_is_gtbs()
93 static uint8_t inst_index(const struct service_inst *inst) in inst_index() argument
98 __ASSERT_NO_MSG(inst); in inst_index()
100 if (inst_is_gtbs(inst)) { in inst_index()
104 tbs = CONTAINER_OF(inst, struct tbs_service_inst, inst); in inst_index()
115 return &gtbs_inst.inst; in inst_lookup_index()
119 return &svc_insts[index].inst; in inst_lookup_index()
[all …]
/Zephyr-Core-3.6.0/soc/riscv/ite_ec/common/
Dsoc_dt.h13 #define IT8XXX2_DEV_WUC(idx, inst) \ argument
14 DEVICE_DT_GET(DT_PHANDLE(IT8XXX2_DT_INST_WUCCTRL(inst, idx), wucs))
15 #define IT8XXX2_DEV_WUC_MASK(idx, inst) \ argument
16 DT_PHA(IT8XXX2_DT_INST_WUCCTRL(inst, idx), wucs, mask)
27 #define IT8XXX2_DT_INST_WUCCTRL(inst, idx) \ argument
28 DT_INST_PHANDLE_BY_IDX(inst, wucctrl, idx)
37 #define IT8XXX2_DT_WUC_ITEMS_FUNC(idx, inst) \ argument
39 .wucs = IT8XXX2_DEV_WUC(idx, inst), \
40 .mask = IT8XXX2_DEV_WUC_MASK(idx, inst), \
50 #define IT8XXX2_DT_INST_WUCCTRL_LEN(inst) \ argument
[all …]
/Zephyr-Core-3.6.0/include/zephyr/devicetree/
Dpwms.h331 #define DT_INST_PWMS_CTLR_BY_IDX(inst, idx) \ argument
332 DT_PWMS_CTLR_BY_IDX(DT_DRV_INST(inst), idx)
343 #define DT_INST_PWMS_CTLR_BY_NAME(inst, name) \ argument
344 DT_PWMS_CTLR_BY_NAME(DT_DRV_INST(inst), name)
353 #define DT_INST_PWMS_CTLR(inst) DT_INST_PWMS_CTLR_BY_IDX(inst, 0) argument
363 #define DT_INST_PWMS_CELL_BY_IDX(inst, idx, cell) \ argument
364 DT_PWMS_CELL_BY_IDX(DT_DRV_INST(inst), idx, cell)
375 #define DT_INST_PWMS_CELL_BY_NAME(inst, name, cell) \ argument
376 DT_PWMS_CELL_BY_NAME(DT_DRV_INST(inst), name, cell)
384 #define DT_INST_PWMS_CELL(inst, cell) \ argument
[all …]
Dclocks.h261 #define DT_INST_CLOCKS_HAS_IDX(inst, idx) \ argument
262 DT_CLOCKS_HAS_IDX(DT_DRV_INST(inst), idx)
270 #define DT_INST_CLOCKS_HAS_NAME(inst, name) \ argument
271 DT_CLOCKS_HAS_NAME(DT_DRV_INST(inst), name)
278 #define DT_INST_NUM_CLOCKS(inst) \ argument
279 DT_NUM_CLOCKS(DT_DRV_INST(inst))
291 #define DT_INST_CLOCKS_CTLR_BY_IDX(inst, idx) \ argument
292 DT_CLOCKS_CTLR_BY_IDX(DT_DRV_INST(inst), idx)
301 #define DT_INST_CLOCKS_CTLR(inst) DT_INST_CLOCKS_CTLR_BY_IDX(inst, 0) argument
314 #define DT_INST_CLOCKS_CTLR_BY_NAME(inst, name) \ argument
[all …]
Dpinctrl.h311 #define DT_INST_PINCTRL_BY_IDX(inst, pc_idx, idx) \ argument
312 DT_PINCTRL_BY_IDX(DT_DRV_INST(inst), pc_idx, idx)
329 #define DT_INST_PINCTRL_0(inst, idx) \ argument
330 DT_PINCTRL_BY_IDX(DT_DRV_INST(inst), 0, idx)
344 #define DT_INST_PINCTRL_BY_NAME(inst, name, idx) \ argument
345 DT_PINCTRL_BY_NAME(DT_DRV_INST(inst), name, idx)
358 #define DT_INST_PINCTRL_NAME_TO_IDX(inst, name) \ argument
359 DT_PINCTRL_NAME_TO_IDX(DT_DRV_INST(inst), name)
371 #define DT_INST_PINCTRL_IDX_TO_NAME_TOKEN(inst, pc_idx) \ argument
372 DT_PINCTRL_IDX_TO_NAME_TOKEN(DT_DRV_INST(inst), pc_idx)
[all …]
/Zephyr-Core-3.6.0/drivers/dma/
Ddma_intel_adsp_hda_host_in.c23 #define INTEL_ADSP_HDA_DMA_HOST_IN_INIT(inst) \ argument
24 static void intel_adsp_hda_dma##inst##_irq_config(void); \
26 static const struct intel_adsp_hda_dma_cfg intel_adsp_hda_dma##inst##_config = { \
27 .base = DT_INST_REG_ADDR(inst), \
28 .regblock_size = DT_INST_REG_SIZE(inst), \
29 .dma_channels = DT_INST_PROP(inst, dma_channels), \
31 .irq_config = intel_adsp_hda_dma##inst##_irq_config \
34 static struct intel_adsp_hda_dma_data intel_adsp_hda_dma##inst##_data = {}; \
36 PM_DEVICE_DT_INST_DEFINE(inst, intel_adsp_hda_dma_pm_action); \
38 DEVICE_DT_INST_DEFINE(inst, &intel_adsp_hda_dma_init, \
[all …]
Ddma_intel_adsp_hda_host_out.c27 #define INTEL_ADSP_HDA_DMA_HOST_OUT_INIT(inst) \ argument
28 static void intel_adsp_hda_dma##inst##_irq_config(void); \
30 static const struct intel_adsp_hda_dma_cfg intel_adsp_hda_dma##inst##_config = { \
31 .base = DT_INST_REG_ADDR(inst), \
32 .regblock_size = DT_INST_REG_SIZE(inst), \
33 .dma_channels = DT_INST_PROP(inst, dma_channels), \
35 .irq_config = intel_adsp_hda_dma##inst##_irq_config, \
38 static struct intel_adsp_hda_dma_data intel_adsp_hda_dma##inst##_data = {}; \
40 PM_DEVICE_DT_INST_DEFINE(inst, intel_adsp_hda_dma_pm_action); \
42 DEVICE_DT_INST_DEFINE(inst, &intel_adsp_hda_dma_init, \
[all …]
/Zephyr-Core-3.6.0/soc/arm/cypress/common/
Dcypress_psoc6_dt.h111 #define CY_PSOC6_PIN_TO_GPIO_REG_ADDR(inst, i) \ argument
112 DT_REG_ADDR(DT_PHANDLE(DT_INST_PINCTRL_0(inst, i), cypress_pins))
115 #define CY_PSOC6_PIN(inst, i) \ argument
116 DT_PHA(DT_INST_PINCTRL_0(inst, i), cypress_pins, pin)
119 #define CY_PSOC6_PIN_HSIOM(inst, i) \ argument
120 DT_PHA(DT_INST_PINCTRL_0(inst, i), cypress_pins, hsiom)
123 #define CY_PSOC6_PIN_FLAG(inst, i, flag) \ argument
124 DT_PROP(DT_INST_PINCTRL_0(inst, i), flag)
127 #define CY_PSOC6_PIN_FLAGS(inst, i) \ argument
128 (CY_PSOC6_PIN_FLAG(inst, i, bias_pull_up) << \
[all …]
/Zephyr-Core-3.6.0/soc/arm/nuvoton_npcx/common/
Dsoc_dt.h40 #define NPCX_DT_INST_PROP_ENUM_OR(inst, prop, default_value) \ argument
41 NPCX_DT_PROP_ENUM_OR(DT_DRV_INST(inst), prop, default_value)
61 #define NPCX_DT_CLK_CFG_ITEM(inst) \ argument
63 .bus = NPCX_DT_INST_PROP_ENUM_OR(inst, clock_bus, \
64 DT_PHA(DT_DRV_INST(inst), clocks, bus)), \
65 .ctrl = DT_PHA(DT_DRV_INST(inst), clocks, ctl), \
66 .bit = DT_PHA(DT_DRV_INST(inst), clocks, bit), \
76 #define NPCX_DT_CLK_CFG_ITEM_BY_IDX(inst, i) \ argument
78 .bus = DT_CLOCKS_CELL_BY_IDX(DT_DRV_INST(inst), i, bus), \
79 .ctrl = DT_CLOCKS_CELL_BY_IDX(DT_DRV_INST(inst), i, ctl), \
[all …]
/Zephyr-Core-3.6.0/modules/lvgl/input/
Dlvgl_encoder_input.c46 #define BUTTON_CODE(inst) DT_INST_PROP_OR(inst, button_input_code, -1) argument
47 #define ROTATION_CODE(inst) DT_INST_PROP(inst, rotation_input_code) argument
49 #define ASSERT_PROPERTIES(inst) \ argument
50 BUILD_ASSERT(IN_RANGE(ROTATION_CODE(inst), 0, 65536), \
52 BUILD_ASSERT(!DT_INST_NODE_HAS_PROP(inst, button_input_code) || \
53 IN_RANGE(BUTTON_CODE(inst), 0, 65536), \
55 BUILD_ASSERT(ROTATION_CODE(inst) != BUTTON_CODE(inst), \
58 #define LVGL_ENCODER_INPUT_DEFINE(inst) \ argument
59 ASSERT_PROPERTIES(inst); \
60 LVGL_INPUT_DEFINE(inst, encoder, CONFIG_LV_Z_ENCODER_INPUT_MSGQ_COUNT, \
[all …]
Dlvgl_keypad_input.c54 #define ASSERT_PROPERTIES(inst) \ argument
55 BUILD_ASSERT(DT_INST_PROP_LEN(inst, input_codes) == DT_INST_PROP_LEN(inst, lvgl_codes), \
58 #define LVGL_KEYPAD_INPUT_DEFINE(inst) \ argument
59 ASSERT_PROPERTIES(inst); \
60 LVGL_INPUT_DEFINE(inst, keypad, CONFIG_LV_Z_KEYPAD_INPUT_MSGQ_COUNT, \
62 static const uint16_t lvgl_keypad_input_codes_##inst[] = DT_INST_PROP(inst, input_codes); \
63 static const uint16_t lvgl_keypad_lvgl_codes_##inst[] = DT_INST_PROP(inst, lvgl_codes); \
64 static const struct lvgl_keypad_input_config lvgl_keypad_input_config_##inst = { \
65 .common_config.event_msgq = &LVGL_INPUT_EVENT_MSGQ(inst, keypad), \
66 .input_codes = lvgl_keypad_input_codes_##inst, \
[all …]
/Zephyr-Core-3.6.0/drivers/sensor/lps2xdf/
Dlps2xdf.c149 #define LPS2XDF_CFG_IRQ(inst) \ argument
151 .gpio_int = GPIO_DT_SPEC_INST_GET(inst, drdy_gpios), \
152 .drdy_pulsed = DT_INST_PROP(inst, drdy_pulsed)
154 #define LPS2XDF_CFG_IRQ(inst) argument
157 #define LPS2XDF_CONFIG_COMMON(inst, name) \ argument
158 .odr = DT_INST_PROP(inst, odr), \
159 .lpf = DT_INST_PROP(inst, lpf), \
160 .avg = DT_INST_PROP(inst, avg), \
162 IF_ENABLED(DT_NODE_HAS_COMPAT(DT_DRV_INST(inst), st_lps28dfw), \
163 (.fs = DT_INST_PROP(inst, fs),)) \
[all …]
/Zephyr-Core-3.6.0/drivers/serial/
Duart_npcx.c27 struct uart_reg *inst; member
83 static int uart_set_npcx_baud_rate(struct uart_reg *const inst, int baud_rate, int src_clk) in uart_set_npcx_baud_rate() argument
88 inst->UPSR = 0x38; in uart_set_npcx_baud_rate()
89 inst->UBAUD = 0x01; in uart_set_npcx_baud_rate()
91 inst->UPSR = 0x08; in uart_set_npcx_baud_rate()
92 inst->UBAUD = 0x0a; in uart_set_npcx_baud_rate()
107 struct uart_reg *const inst = config->inst; in uart_npcx_tx_fifo_ready() local
110 return !(GET_FIELD(inst->UFTSTS, NPCX_UFTSTS_TEMPTY_LVL) == 0); in uart_npcx_tx_fifo_ready()
116 struct uart_reg *const inst = config->inst; in uart_npcx_rx_fifo_available() local
119 return IS_BIT_SET(inst->UFRSTS, NPCX_UFRSTS_RFIFO_NEMPTY_STS); in uart_npcx_rx_fifo_available()
[all …]
/Zephyr-Core-3.6.0/drivers/bbram/
Dnpcx.h24 #define BBRAM_NPCX_DECL_CONFIG(inst) \ argument
25 static uint8_t bbram_npcx_emul_buffer_##inst[DT_INST_REG_SIZE_BY_NAME(inst, memory)]; \
26 static uint8_t bbram_npcx_emul_status_##inst; \
27 static const struct bbram_npcx_config bbram_cfg_##inst = { \
28 .base_addr = (uintptr_t)bbram_npcx_emul_buffer_##inst, \
29 .size = DT_INST_REG_SIZE_BY_NAME(inst, memory), \
30 .status_reg_addr = (uintptr_t)&bbram_npcx_emul_status_##inst, \
33 #define BBRAM_NPCX_DECL_CONFIG(inst) \ argument
34 static const struct bbram_npcx_config bbram_cfg_##inst = { \
35 .base_addr = DT_INST_REG_ADDR_BY_NAME(inst, memory), \
[all …]
/Zephyr-Core-3.6.0/include/zephyr/bluetooth/audio/
Daics.h163 typedef void (*bt_aics_write_cb)(struct bt_aics *inst, int err);
179 typedef void (*bt_aics_state_cb)(struct bt_aics *inst, int err, int8_t gain,
197 typedef void (*bt_aics_gain_setting_cb)(struct bt_aics *inst, int err,
212 typedef void (*bt_aics_type_cb)(struct bt_aics *inst, int err, uint8_t type);
225 typedef void (*bt_aics_status_cb)(struct bt_aics *inst, int err, bool active);
238 typedef void (*bt_aics_description_cb)(struct bt_aics *inst, int err,
252 typedef void (*bt_aics_discover_cb)(struct bt_aics *inst, int err);
284 int bt_aics_discover(struct bt_conn *conn, struct bt_aics *inst,
297 int bt_aics_deactivate(struct bt_aics *inst);
310 int bt_aics_activate(struct bt_aics *inst);
[all …]
/Zephyr-Core-3.6.0/drivers/sensor/nuvoton_tach_npcx/
Dtach_nuvoton_npcx.c95 struct tach_reg *const inst = HAL_INSTANCE(dev); in tach_npcx_start_port_a() local
98 inst->TCNT1 = NPCX_TACHO_CNT_MAX; in tach_npcx_start_port_a()
99 inst->TCRA = NPCX_TACHO_CNT_MAX; in tach_npcx_start_port_a()
106 inst->TMCTRL |= BIT(NPCX_TMCTRL_TAEN); in tach_npcx_start_port_a()
109 inst->TCFG |= BIT(NPCX_TCFG_TADBEN); in tach_npcx_start_port_a()
112 SET_FIELD(inst->TCKC, NPCX_TCKC_C1CSEL_FIELD, data->input_clk == LFCLK in tach_npcx_start_port_a()
118 struct tach_reg *const inst = HAL_INSTANCE(dev); in tach_npcx_start_port_b() local
122 inst->TCNT2 = NPCX_TACHO_CNT_MAX; in tach_npcx_start_port_b()
123 inst->TCRB = NPCX_TACHO_CNT_MAX; in tach_npcx_start_port_b()
130 inst->TMCTRL |= BIT(NPCX_TMCTRL_TBEN); in tach_npcx_start_port_b()
[all …]
/Zephyr-Core-3.6.0/drivers/can/
Dcan_sam.c152 #define CAN_SAM_IRQ_CFG_FUNCTION(inst) \ argument
153 static void config_can_##inst##_irq(void) \
156 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(inst, int0, irq), \
157 DT_INST_IRQ_BY_NAME(inst, int0, priority), can_mcan_line_0_isr, \
158 DEVICE_DT_INST_GET(inst), 0); \
159 irq_enable(DT_INST_IRQ_BY_NAME(inst, int0, irq)); \
160 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(inst, int1, irq), \
161 DT_INST_IRQ_BY_NAME(inst, int1, priority), can_mcan_line_1_isr, \
162 DEVICE_DT_INST_GET(inst), 0); \
163 irq_enable(DT_INST_IRQ_BY_NAME(inst, int1, irq)); \
[all …]
/Zephyr-Core-3.6.0/subsys/input/
Dinput_longpress.c105 #define INPUT_LONGPRESS_DEFINE(inst) \ argument
106 BUILD_ASSERT((DT_INST_PROP_LEN(inst, input_codes) == \
107 DT_INST_PROP_LEN_OR(inst, short_codes, 0)) || \
108 !DT_INST_NODE_HAS_PROP(inst, short_codes)); \
109 BUILD_ASSERT(DT_INST_PROP_LEN(inst, input_codes) == DT_INST_PROP_LEN(inst, long_codes)); \
111 static void longpress_cb_##inst(struct input_event *evt) \
113 longpress_cb(DEVICE_DT_INST_GET(inst), evt); \
115 INPUT_CALLBACK_DEFINE(DEVICE_DT_GET_OR_NULL(DT_INST_PHANDLE(inst, input)), \
116 longpress_cb_##inst); \
118 static const uint16_t longpress_input_codes_##inst[] = DT_INST_PROP(inst, input_codes); \
[all …]
/Zephyr-Core-3.6.0/include/zephyr/
Ddevicetree.h334 #define DT_INST(inst, compat) UTIL_CAT(DT_N_INST, DT_DASH(inst, compat)) argument
3410 #define DT_DRV_INST(inst) DT_INST(inst, DT_DRV_COMPAT) argument
3419 #define DT_INST_PARENT(inst) DT_PARENT(DT_DRV_INST(inst)) argument
3428 #define DT_INST_GPARENT(inst) DT_GPARENT(DT_DRV_INST(inst)) argument
3439 #define DT_INST_CHILD(inst, child) \ argument
3440 DT_CHILD(DT_DRV_INST(inst), child)
3456 #define DT_INST_FOREACH_CHILD(inst, fn) \ argument
3457 DT_FOREACH_CHILD(DT_DRV_INST(inst), fn)
3472 #define DT_INST_FOREACH_CHILD_SEP(inst, fn, sep) \ argument
3473 DT_FOREACH_CHILD_SEP(DT_DRV_INST(inst), fn, sep)
[all …]
/Zephyr-Core-3.6.0/drivers/pwm/
Dpwm_npcx.c56 struct pwm_reg *inst = config->base; in pwm_npcx_configure() local
59 inst->PWMCTL &= ~BIT(NPCX_PWMCTL_PWR); in pwm_npcx_configure()
62 inst->PWMCTL &= ~BIT(NPCX_PWMCTL_INVP); in pwm_npcx_configure()
65 SET_FIELD(inst->PWMCTL, NPCX_PWMCTL_HB_DC_CTL_FIELD, in pwm_npcx_configure()
69 SET_FIELD(inst->PWMCTLEX, NPCX_PWMCTLEX_FCK_SEL_FIELD, in pwm_npcx_configure()
74 inst->PWMCTL |= BIT(NPCX_PWMCTL_CKSEL); in pwm_npcx_configure()
76 inst->PWMCTL &= ~BIT(NPCX_PWMCTL_CKSEL); in pwm_npcx_configure()
88 struct pwm_reg *inst = config->base; in pwm_npcx_set_cycles() local
95 ctl = inst->PWMCTL | BIT(NPCX_PWMCTL_PWR); in pwm_npcx_set_cycles()
107 inst->PWMCTL = ctl; in pwm_npcx_set_cycles()
[all …]

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