Searched refs:clock_control_subsys_rate_t (Results 1 – 14 of 14) sorted by relevance
/Zephyr-Core-3.6.0/tests/drivers/clock_control/adsp_clock/src/ |
D | main.c | 45 clock_control_set_rate(dev, NULL, (clock_control_subsys_rate_t) in ZTEST() 49 clock_control_set_rate(dev, NULL, (clock_control_subsys_rate_t) in ZTEST() 54 clock_control_set_rate(dev, NULL, (clock_control_subsys_rate_t) in ZTEST()
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/Zephyr-Core-3.6.0/include/zephyr/drivers/ |
D | clock_control.h | 64 typedef void *clock_control_subsys_rate_t; typedef 94 clock_control_subsys_rate_t rate); 248 clock_control_subsys_rate_t rate) in clock_control_set_rate()
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/Zephyr-Core-3.6.0/drivers/clock_control/ |
D | clock_control_adsp.c | 12 clock_control_subsys_rate_t rate) in cavs_clock_ctrl_set_rate()
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D | clock_control_pwm.c | 101 static int clock_control_pwm_set_rate(const struct device *dev, clock_control_subsys_rate_t sys, in clock_control_pwm_set_rate() 102 clock_control_subsys_rate_t rate) in clock_control_pwm_set_rate()
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D | clock_control_smartbond.c | 297 smartbond_clock_control_on(dev, (clock_control_subsys_rate_t)clk); in smartbond_clock_control_on_by_ord() 305 smartbond_clock_control_off(dev, (clock_control_subsys_rate_t)clk); in smartbond_clock_control_off_by_ord() 447 (clock_control_subsys_rate_t)smartbond_source_clock(sys_clk)); in smartbond_clocks_init()
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D | clock_control_renesas_cpg_mssr.h | 143 clock_control_subsys_rate_t rate);
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D | clock_control_mcux_ccm_rev2.c | 167 clock_control_subsys_rate_t rate) in mcux_ccm_set_subsys_rate()
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D | clock_control_numaker_scc.c | 69 clock_control_subsys_rate_t rate) in numaker_scc_set_rate()
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D | clock_control_r8a779f0_cpg_mssr.c | 78 (clock_control_subsys_rate_t)rate); in r8a779f0_cpg_core_clock_endisable()
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D | clock_control_r8a7795_cpg_mssr.c | 133 (clock_control_subsys_rate_t)rate); in r8a7795_cpg_core_clock_endisable()
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D | clock_control_mcux_ccm.c | 347 clock_control_subsys_rate_t rate) in mcux_ccm_set_subsys_rate()
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D | clock_control_renesas_cpg_mssr.c | 259 clock_control_subsys_rate_t rate) in rcar_cpg_set_rate()
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/Zephyr-Core-3.6.0/tests/drivers/clock_control/pwm_clock/src/ |
D | main.c | 61 ret = clock_control_set_rate(clk_dev, 0, (clock_control_subsys_rate_t)clock_rate); in ZTEST()
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/Zephyr-Core-3.6.0/drivers/memc/ |
D | memc_mcux_flexspi.c | 103 (clock_control_subsys_rate_t)freq_hz); in memc_flexspi_update_clock()
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