Home
last modified time | relevance | path

Searched refs:clock_control_on (Results 1 – 25 of 175) sorted by relevance

1234567

/Zephyr-Core-3.6.0/samples/drivers/clock_control_litex/src/
Dmain.c103 ret = clock_control_on(dev, sub_system1); in litex_clk_test_single()
107 ret = clock_control_on(dev, sub_system2); in litex_clk_test_single()
147 ret = clock_control_on(dev, sub_system); in litex_clk_test_freq()
152 ret = clock_control_on(dev, sub_system); in litex_clk_test_freq()
163 ret = clock_control_on(dev, sub_system); in litex_clk_test_freq()
168 ret = clock_control_on(dev, sub_system); in litex_clk_test_freq()
199 ret = clock_control_on(dev, sub_system1); in litex_clk_test_phase()
209 ret = clock_control_on(dev, sub_system2); in litex_clk_test_phase()
238 ret = clock_control_on(dev, sub_system1); in litex_clk_test_duty()
242 ret = clock_control_on(dev, sub_system2); in litex_clk_test_duty()
[all …]
/Zephyr-Core-3.6.0/drivers/ethernet/
Deth_dwmac_stm32h7x.c60 ret = clock_control_on(p->clock, (clock_control_subsys_t)&pclken); in dwmac_bus_init()
61 ret |= clock_control_on(p->clock, (clock_control_subsys_t)&pclken_tx); in dwmac_bus_init()
62 ret |= clock_control_on(p->clock, (clock_control_subsys_t)&pclken_rx); in dwmac_bus_init()
/Zephyr-Core-3.6.0/drivers/counter/
Dtimer_dtmr_cmsdk_apb.c158 clock_control_on(clk, (clock_control_subsys_t) &cfg->dtimer_cc_as); in dtmr_cmsdk_apb_init()
159 clock_control_on(clk, (clock_control_subsys_t) &cfg->dtimer_cc_ss); in dtmr_cmsdk_apb_init()
160 clock_control_on(clk, (clock_control_subsys_t) &cfg->dtimer_cc_dss); in dtmr_cmsdk_apb_init()
Dtimer_tmr_cmsdk_apb.c158 clock_control_on(clk, (clock_control_subsys_t) &cfg->timer_cc_as); in tmr_cmsdk_apb_init()
159 clock_control_on(clk, (clock_control_subsys_t) &cfg->timer_cc_ss); in tmr_cmsdk_apb_init()
160 clock_control_on(clk, (clock_control_subsys_t) &cfg->timer_cc_dss); in tmr_cmsdk_apb_init()
Dcounter_ll_stm32_rtc.c193 if (clock_control_on(clk, (clock_control_subsys_t) &cfg->pclken[0]) != 0) { in rtc_stm32_start()
216 if (clock_control_on(clk, (clock_control_subsys_t) &cfg->pclken[0]) != 0) { in rtc_stm32_stop()
552 if (clock_control_on(clk, (clock_control_subsys_t) &cfg->pclken[0]) != 0) { in rtc_stm32_init()
662 if (clock_control_on(clk, (clock_control_subsys_t) &cfg->pclken[0]) != 0) { in rtc_stm32_pm_action()
/Zephyr-Core-3.6.0/soc/arm/st_stm32/common/
Dstm32_backup_sram.c35 ret = clock_control_on(clk, (clock_control_subsys_t)&config->pclken); in stm32_backup_sram_init()
/Zephyr-Core-3.6.0/drivers/bluetooth/hci/
Dapollox_blue.c84 clock_control_on(clk32m_dev, in bt_clkreq_isr()
212 clock_control_on(clk32k_dev, (clock_control_subsys_t)CLOCK_CONTROL_AMBIQ_TYPE_LFXTAL); in bt_hci_transport_setup()
215 clock_control_on(clk32m_dev, (clock_control_subsys_t)CLOCK_CONTROL_AMBIQ_TYPE_HFXTAL_BLE); in bt_hci_transport_setup()
/Zephyr-Core-3.6.0/drivers/hwinfo/
Dhwinfo_sam_rstc.c64 (void)clock_control_on(SAM_DT_PMC_CONTROLLER, in hwinfo_rstc_init()
/Zephyr-Core-3.6.0/drivers/pinctrl/
Dpinctrl_gd32_afio.c71 (void)clock_control_on(GD32_CLOCK_CONTROLLER, in afio_init()
141 (void)clock_control_on(GD32_CLOCK_CONTROLLER, in configure_pin()
Dpinctrl_kinetis.c66 err = clock_control_on(config->clock_dev, config->clock_subsys); in pinctrl_mcux_init()
Dpinctrl_gd32_af.c91 (void)clock_control_on(GD32_CLOCK_CONTROLLER, in pinctrl_configure_pin()
/Zephyr-Core-3.6.0/samples/drivers/clock_control_litex/
DREADME.rst42 …ed with the :ref:`Clock Control API <clock_control_api>` function ``clock_control_on()`` and a Lit…
47 …ructure ``litex_clk_setup`` onto ``clock_control_subsys_t`` and use it with ``clock_control_on()``.
62 if ((ret = clock_control_on(dev, sub_system)) != 0) {
69 In both getter functions, basic usage is similar to ``clock_control_on()``. Structure ``litex_clk_s…
/Zephyr-Core-3.6.0/drivers/usb/device/
Dusb_dc_dw_stm32.h52 return clock_control_on(clk->dev, (void *)&clk->pclken[0]); in clk_enable_st_stm32f4_fsotg()
/Zephyr-Core-3.6.0/tests/drivers/clock_control/fixed_clock/src/
Dtest_clock_control.c29 err = clock_control_on(dev, 0); in ZTEST()
/Zephyr-Core-3.6.0/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/
Dtest_stm32_clock_configuration_i2s.c28 r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
Dtest_stm32_clock_configuration_lptim.c33 r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
Dtest_stm32_clock_configuration_adc.c65 r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
/Zephyr-Core-3.6.0/drivers/misc/pio_rpi_pico/
Dpio_rpi_pico.c49 ret = clock_control_on(config->clk_dev, config->clk_id); in pio_rpi_pico_init()
/Zephyr-Core-3.6.0/drivers/dac/
Ddac_esp32.c68 if (clock_control_on(cfg->clock_dev, in dac_esp32_init()
/Zephyr-Core-3.6.0/tests/drivers/clock_control/clock_control_api/src/
Dtest_clock_control.c164 err = clock_control_on(dev, subsys); in test_on_off_status_instance()
310 err = clock_control_on(dev, subsys); in test_double_start_on_instance()
313 err = clock_control_on(dev, subsys); in test_double_start_on_instance()
/Zephyr-Core-3.6.0/drivers/usb/udc/
Dudc_dwc2_vendor_quirks.h59 return clock_control_on(clk->dev, (void *)&clk->pclken[0]); in clk_enable_stm32f4_fsotg()
/Zephyr-Core-3.6.0/tests/drivers/clock_control/pwm_clock/src/
Dmain.c34 ret = clock_control_on(clk_dev, 0); in pwm_clock_setup()
/Zephyr-Core-3.6.0/drivers/memc/
Dmemc_stm32.c61 r = clock_control_on(clk, (clock_control_subsys_t)&config->pclken[0]); in memc_stm32_init()
/Zephyr-Core-3.6.0/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_devices/src/
Dtest_stm32_clock_configuration.c45 r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
/Zephyr-Core-3.6.0/soc/arm/st_stm32/stm32wba/hci_if/
Dbleplat.c123 clock_control_on(rcc, rng_pclken); in enable_rng_clock()

1234567