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Searched refs:clkid (Results 1 – 23 of 23) sorted by relevance

/Zephyr-Core-3.6.0/drivers/pinctrl/
Dpinctrl_gd32_afio.c68 uint16_t clkid = DT_CLOCKS_CELL(AFIO_NODE, id); in afio_init() local
72 (clock_control_subsys_t)&clkid); in afio_init()
123 uint16_t clkid; in configure_pin() local
128 clkid = gd32_port_clkids[port_idx]; in configure_pin()
142 (clock_control_subsys_t)&clkid); in configure_pin()
Dpinctrl_gd32_af.c81 uint16_t clkid; in pinctrl_configure_pin() local
86 clkid = gd32_port_clkids[port_idx]; in pinctrl_configure_pin()
92 (clock_control_subsys_t)&clkid); in pinctrl_configure_pin()
/Zephyr-Core-3.6.0/drivers/clock_control/
Dclock_control_renesas_ra.c193 uint32_t clkid = (uint32_t)subsys; in clock_control_ra_on() local
196 MSTP_write(MSTPCRA_OFFSET + RA_CLOCK_GROUP(clkid), in clock_control_ra_on()
197 MSTP_read(MSTPCRB_OFFSET) & ~RA_CLOCK_BIT(clkid)); in clock_control_ra_on()
205 uint32_t clkid = (uint32_t)subsys; in clock_control_ra_off() local
208 MSTP_write(MSTPCRA_OFFSET + RA_CLOCK_GROUP(clkid), in clock_control_ra_off()
209 MSTP_read(MSTPCRB_OFFSET) | RA_CLOCK_BIT(clkid)); in clock_control_ra_off()
218 uint32_t clkid = (uint32_t)subsys; in clock_control_ra_get_rate() local
220 switch (clkid & 0xFFFFFF00) { in clock_control_ra_get_rate()
Dclock_control_rpi_pico.c206 enum rpi_pico_clkid clkid = (enum rpi_pico_clkid)sys; in rpi_pico_frequency_count() local
210 switch (clkid) { in rpi_pico_frequency_count()
490 enum rpi_pico_clkid clkid = (enum rpi_pico_clkid)sys; in clock_control_rpi_pico_on() local
493 if (rpi_pico_is_valid_clock_index(clkid) < 0) { in clock_control_rpi_pico_on()
497 hw_set_bits(&clocks_regs->clk[clkid].ctrl, CTRL_ENABLE_BITS); in clock_control_rpi_pico_on()
505 enum rpi_pico_clkid clkid = (enum rpi_pico_clkid)sys; in clock_control_rpi_pico_off() local
508 if (rpi_pico_is_valid_clock_index(clkid) < 0) { in clock_control_rpi_pico_off()
512 hw_clear_bits(&clocks_regs->clk[clkid].ctrl, CTRL_ENABLE_BITS); in clock_control_rpi_pico_off()
520 enum rpi_pico_clkid clkid = (enum rpi_pico_clkid)sys; in clock_control_rpi_pico_get_status() local
522 if (rpi_pico_is_valid_clock_index(clkid) < 0) { in clock_control_rpi_pico_get_status()
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/Zephyr-Core-3.6.0/drivers/watchdog/
Dwdt_dw.c42 clock_control_subsys_t clkid; member
181 ret = clock_control_get_rate(dev_config->clk_dev, dev_config->clkid,
259 IF_ENABLED(DT_PHA_HAS_CELL(DT_DRV_INST(inst), clocks, clkid), \
262 .clkid = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(inst, clkid), \
272 (COND_CODE_1(DT_PHA_HAS_CELL(DT_DRV_INST(inst), clocks, clkid), \
Dwdt_wwdgt_gd32.c27 uint16_t clkid; member
60 (clock_control_subsys_t)&config->clkid, in gd32_wwdgt_calc_ticks()
207 (clock_control_subsys_t)&config->clkid); in gd32_wwdgt_init()
215 .clkid = DT_INST_CLOCKS_CELL(0, id),
/Zephyr-Core-3.6.0/drivers/pwm/
Dpwm_gd32.c43 uint16_t clkid; member
158 (clock_control_subsys_t)&config->clkid); in pwm_gd32_init()
170 (clock_control_subsys_t)&config->clkid, in pwm_gd32_init()
196 .clkid = DT_CLOCKS_CELL(DT_INST_PARENT(i), id), \
/Zephyr-Core-3.6.0/drivers/dac/
Ddac_gd32.c38 uint16_t clkid; member
159 (clock_control_subsys_t)&cfg->clkid); in dac_gd32_init()
172 .clkid = DT_INST_CLOCKS_CELL(0, id),
/Zephyr-Core-3.6.0/drivers/sdhc/
Dsdhc_cdns.c37 clock_control_subsys_t clkid; member
158 sdhc_config->clkid, &data->params.clk_rate); in sdhc_cdns_init()
252 .clkid = (clock_control_subsys_t)0, \
257 .clkid = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(inst, clkid), \
/Zephyr-Core-3.6.0/drivers/serial/
Duart_lpc11u6x.h133 uint32_t clkid; member
172 uint32_t clkid; member
Duart_lpc11u6x.c89 clock_control_get_rate(clk_drv, (clock_control_subsys_t) cfg->clkid, in lpc11u6x_uart0_config_baudrate()
355 clock_control_on(cfg->clock_dev, (clock_control_subsys_t) cfg->clkid); in lpc11u6x_uart0_init()
388 .clkid = DT_PHA_BY_IDX(DT_NODELABEL(uart0), clocks, 0, clkid),
493 clock_control_get_rate(clk_drv, (clock_control_subsys_t) cfg->clkid, in lpc11u6x_uartx_config_baud()
777 clock_control_on(cfg->clock_dev, (clock_control_subsys_t) cfg->clkid); in lpc11u6x_uartx_init()
845 .clkid = DT_PHA_BY_IDX(DT_NODELABEL(uart##idx), clocks, 0, clkid), \
Dusart_gd32.c26 uint16_t clkid; member
89 (clock_control_subsys_t)&cfg->clkid); in usart_gd32_init()
328 .clkid = DT_INST_CLOCKS_CELL(n, id), \
Duart_ns16550.c1922 0, clocks, clkid), \
/Zephyr-Core-3.6.0/drivers/counter/
Dcounter_dw_timer.c54 clock_control_subsys_t clkid; member
331 timer_config->clkid, &data->freq); in counter_dw_timer_init()
367 .clkid = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(inst, clkid), \
Dcounter_gd32_timer.c44 uint16_t clkid; member
434 (clock_control_subsys_t)&cfg->clkid); in counter_gd32_timer_init()
436 (clock_control_subsys_t)&cfg->clkid, &pclk); in counter_gd32_timer_init()
519 .clkid = DT_INST_CLOCKS_CELL(n, id), \
/Zephyr-Core-3.6.0/drivers/i2c/
Di2c_lpc11u6x.c23 clock_control_get_rate(clk_dev, (clock_control_subsys_t) cfg->clkid, in lpc11u6x_i2c_set_bus_speed()
323 clock_control_on(cfg->clock_dev, (clock_control_subsys_t) cfg->clkid); in lpc11u6x_i2c_init()
362 .clkid = DT_INST_PHA_BY_IDX(idx, clocks, 0, clkid), \
Di2c_lpc11u6x.h74 uint32_t clkid; member
Di2c_gd32.c39 uint16_t clkid; member
507 (clock_control_subsys_t)&cfg->clkid, in i2c_gd32_configure()
671 (clock_control_subsys_t)&cfg->clkid); in i2c_gd32_init()
706 .clkid = DT_INST_CLOCKS_CELL(inst, id), \
/Zephyr-Core-3.6.0/drivers/gpio/
Dgpio_gd32.c48 uint16_t clkid; member
352 (clock_control_subsys_t)&config->clkid); in gpio_gd32_init()
367 .clkid = DT_INST_CLOCKS_CELL(n, id), \
Dgpio_lpc11u6x.c504 .clock_subsys = (clock_control_subsys_t) DT_INST_PHA(0, clocks, clkid),
/Zephyr-Core-3.6.0/drivers/adc/
Dadc_gd32.c136 uint16_t clkid; member
386 (clock_control_subsys_t)&cfg->clkid); in adc_gd32_init()
493 .clkid = DT_INST_CLOCKS_CELL(n, id), \
/Zephyr-Core-3.6.0/drivers/spi/
Dspi_gd32.c60 uint16_t clkid; member
176 (clock_control_subsys_t)&cfg->clkid, in spi_gd32_configure()
588 (clock_control_subsys_t)&cfg->clkid); in spi_gd32_init()
674 .clkid = DT_INST_CLOCKS_CELL(idx, id), \
/Zephyr-Core-3.6.0/drivers/dma/
Ddma_gd32.c64 uint16_t clkid; member
605 (clock_control_subsys_t)&cfg->clkid); in dma_gd32_init()
679 .clkid = DT_INST_CLOCKS_CELL(inst, id), \