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Searched refs:clk_phase (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.6.0/drivers/spi/
Dspi_nxp_s32.c273 bool clk_phase, clk_polarity; in spi_nxp_s32_configure() local
294 clk_phase = !!(SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_CPHA); in spi_nxp_s32_configure()
371 data->transfer_cfg.Ctar |= SPI_CTAR_CPHA(clk_phase) | SPI_CTAR_CPOL(clk_polarity); in spi_nxp_s32_configure()
382 clk_polarity, clk_phase, lsb, frame_size); in spi_nxp_s32_configure()
387 best_baud.frequency, clk_polarity, clk_phase, in spi_nxp_s32_configure()
/Zephyr-Core-3.6.0/drivers/flash/
Dflash_cadence_qspi_nor_ll.h174 uint32_t clk_phase, uint32_t clk_pol, uint32_t csda,
Dflash_cadence_qspi_nor_ll.c599 int cad_qspi_init(struct cad_qspi_params *cad_params, uint32_t clk_phase, uint32_t clk_pol, in cad_qspi_init() argument
618 status = cad_qspi_timing_config(cad_params, clk_phase, clk_pol, csda, csdads, cseot, cssot, in cad_qspi_init()