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Searched refs:clk_info (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.6.0/drivers/clock_control/
Dclock_control_renesas_cpg_mssr.c90 static uint32_t rcar_cpg_get_divider(const struct device *dev, struct cpg_clk_info_table *clk_info) in rcar_cpg_get_divider() argument
97 if (clk_info->domain == CPG_MOD) { in rcar_cpg_get_divider()
101 reg_addr = clk_info->offset; in rcar_cpg_get_divider()
111 divider = data->get_div_helper(reg_val, clk_info->module); in rcar_cpg_get_divider()
121 static int rcar_cpg_update_out_freq(const struct device *dev, struct cpg_clk_info_table *clk_info) in rcar_cpg_update_out_freq() argument
123 uint32_t divider = rcar_cpg_get_divider(dev, clk_info); in rcar_cpg_update_out_freq()
129 clk_info->out_freq = clk_info->in_freq / divider; in rcar_cpg_update_out_freq()
134 struct cpg_clk_info_table *clk_info) in rcar_cpg_get_in_update_out_freq() argument
139 if (!clk_info) { in rcar_cpg_get_in_update_out_freq()
143 if (clk_info->in_freq != RCAR_CPG_NONE) { in rcar_cpg_get_in_update_out_freq()
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Dclock_control_r8a7795_cpg_mssr.c75 struct cpg_clk_info_table *clk_info, uint32_t enable) in r8a7795_cpg_enable_disable_core() argument
82 switch (clk_info->module) { in r8a7795_cpg_enable_disable_core()
87 reg = sys_read32(DEVICE_MMIO_GET(dev) + clk_info->offset); in r8a7795_cpg_enable_disable_core()
95 reg = sys_read32(DEVICE_MMIO_GET(dev) + clk_info->offset); in r8a7795_cpg_enable_disable_core()
100 reg = sys_read32(DEVICE_MMIO_GET(dev) + clk_info->offset); in r8a7795_cpg_enable_disable_core()
110 rcar_cpg_write(DEVICE_MMIO_GET(dev), clk_info->offset, reg); in r8a7795_cpg_enable_disable_core()
118 struct cpg_clk_info_table *clk_info; in r8a7795_cpg_core_clock_endisable() local
122 clk_info = rcar_cpg_find_clk_info_by_module_id(dev, clk->domain, clk->module); in r8a7795_cpg_core_clock_endisable()
123 if (!clk_info) { in r8a7795_cpg_core_clock_endisable()
141 r8a7795_cpg_enable_disable_core(dev, clk_info, enable); in r8a7795_cpg_core_clock_endisable()
Dclock_control_r8a779f0_cpg_mssr.c51 struct cpg_clk_info_table *clk_info, uint32_t enable) in r8a779f0_cpg_enable_disable_core() argument
54 ARG_UNUSED(clk_info); in r8a779f0_cpg_enable_disable_core()
63 struct cpg_clk_info_table *clk_info; in r8a779f0_cpg_core_clock_endisable() local
67 clk_info = rcar_cpg_find_clk_info_by_module_id(dev, clk->domain, clk->module); in r8a779f0_cpg_core_clock_endisable()
68 if (!clk_info) { in r8a779f0_cpg_core_clock_endisable()
86 r8a779f0_cpg_enable_disable_core(dev, clk_info, enable); in r8a779f0_cpg_core_clock_endisable()