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Searched refs:clk32k_ch_enable (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.6.0/drivers/pwm/
Dpwm_b91.c18 uint8_t clk32k_ch_enable; member
40 clk_32k_en |= (config->clk32k_ch_enable & BIT(0)) ? PWM_CLOCK_32K_CHN_PWM0 : 0; in pwm_b91_init()
41 clk_32k_en |= (config->clk32k_ch_enable & BIT(1)) ? PWM_CLOCK_32K_CHN_PWM1 : 0; in pwm_b91_init()
42 clk_32k_en |= (config->clk32k_ch_enable & BIT(2)) ? PWM_CLOCK_32K_CHN_PWM2 : 0; in pwm_b91_init()
43 clk_32k_en |= (config->clk32k_ch_enable & BIT(3)) ? PWM_CLOCK_32K_CHN_PWM3 : 0; in pwm_b91_init()
44 clk_32k_en |= (config->clk32k_ch_enable & BIT(4)) ? PWM_CLOCK_32K_CHN_PWM4 : 0; in pwm_b91_init()
45 clk_32k_en |= (config->clk32k_ch_enable & BIT(5)) ? PWM_CLOCK_32K_CHN_PWM5 : 0; in pwm_b91_init()
103 if ((config->clk32k_ch_enable & BIT(channel)) != 0U) { in pwm_b91_get_cycles_per_sec()
126 .clk32k_ch_enable = \