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/Zephyr-latest/arch/xtensa/core/
Duserspace.S64 s32i a3, a0, ___xtensa_irq_bsa_t_a3_OFFSET
68 movi a3, ~PS_OWB_MASK
69 and a2, a2, a3
81 rsr.ps a3
82 or a3, a3, a2
84 and a3, a3, a2
85 wsr.ps a3
88 l32i a3, a0, ___xtensa_irq_bsa_t_a3_OFFSET
98 l32i a3, a1, ___xtensa_irq_bsa_t_pc_OFFSET
105 addi a3, a3, 3
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Dxtensa_hifi.S27 movi a3, ~(XCHAL_CP1_SA_ALIGN - 1)
28 and a2, a2, a3
30 xchal_cp1_load a2 a3 a3 a3 a3 /* Only A2 and A3 are used by macro */
48 movi a3, ~(XCHAL_CP1_SA_ALIGN - 1)
49 and a2, a2, a3
51 xchal_cp1_store a2 a3 a3 a3 a3 /* Only A2 and A3 are used by macro */
Dwindow_vectors.S59 s32e a3, a5, -4 /* save a3 to call[j+1]'s stack frame */
81 l32e a3, a5, -4 /* restore a3 from call[i+1]'s stack frame */
103 extui a3, a2, XCHAL_PS_OWB_SHIFT, XCHAL_PS_OWB_BITS
104 xor a3, a3, a4 /* bits changed from old to current windowbase */
106 slli a3, a3, XCHAL_PS_OWB_SHIFT
107 xor a2, a2, a3 /* flip changed bits in old window base */
138 s32e a3, a9, -4 /* save a3 to call[j+1]'s stack frame */
167 l32e a3, a9, -4 /* restore a3 from call[i+1]'s stack frame */
196 s32e a3, a13, -4 /* save a3 to call[j+1]'s stack frame */
229 l32e a3, a13, -4 /* restore a3 from call[i+1]'s stack frame */
Dsyscall_helper.c22 register uintptr_t a3 __asm__("%a3") = arg2; in xtensa_syscall_helper_args_6()
30 : "r" (a2), "r" (a6), "r" (a3), "r" (a4), in xtensa_syscall_helper_args_6()
43 register uintptr_t a3 __asm__("%a3") = arg2; in xtensa_syscall_helper_args_5()
50 : "r" (a2), "r" (a6), "r" (a3), "r" (a4), in xtensa_syscall_helper_args_5()
63 register uintptr_t a3 __asm__("%a3") = arg2; in xtensa_syscall_helper_args_4()
69 : "r" (a2), "r" (a6), "r" (a3), "r" (a4), in xtensa_syscall_helper_args_4()
81 register uintptr_t a3 __asm__("%a3") = arg2; in xtensa_syscall_helper_args_3()
86 : "r" (a2), "r" (a6), "r" (a3), "r" (a4) in xtensa_syscall_helper_args_3()
97 register uintptr_t a3 __asm__("%a3") = arg2; in xtensa_syscall_helper_args_2()
101 : "r" (a2), "r" (a6), "r" (a3) in xtensa_syscall_helper_args_2()
Dxtensa_asm2_util.S46 slli a3, a2, (XCHAL_NUM_AREGS / 4)
47 or a2, a2, a3
48 rsr a3, WINDOWBASE
49 ssr a3
52 mov a3, a1 /* Stash our original stack pointer */
87 s32i a3, a1, 0
105 mov a3, a2
129 mov a1, a3 /* Original stack */
191 l32i a3, a1, ___xtensa_irq_bsa_t_a3_OFFSET
247 s32i a3, a1, ___xtensa_irq_bsa_t_a3_OFFSET
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Dcrt1.S34 # define ARG2 a3 /* 2nd outgoing call argument */
101 movi a3, PS_UM|PS_INTLEVEL(XCHAL_EXCM_LEVEL)
109 movi a3, PS_UM|PS_WOE|PS_INTLEVEL(XCHAL_EXCM_LEVEL)
111 wsr a3, PS
/Zephyr-latest/arch/xtensa/core/startup/
Dreset_vector.S107 movi a3, xthal_pso_savearea
117 l32i a4, a3, CS_SA_signature
123 l32i a4, a3, CS_SA_memctl
238 l32i a4, a3, CS_SA_signature
273 rsr.prid a3 /* core and multiprocessor ID */
274 extui a3, a3, 0, 8 /* extract core ID (FIXME: need proper
277 bnez a3, .Ldonesync /* only do this on core 0 */
304 movi a3, 0x25
307 movi a3, 0x15
309 wsr a3, ATOMCTL
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/Zephyr-latest/arch/xtensa/include/
Dxtensa_asm2_s.h356 mov a6, a3 /* place "new sp" in the next frame's A2 */
358 mov a3, a1 /* stash it locally in A3 too */
367 mov a1, a3 /* restore original SP */
441 movi a3, ~(PS_INTLEVEL_MASK)
442 and a0, a0, a3
443 movi a3, PS_INTLEVEL(ZSR_RFI_LEVEL)
444 or a0, a0, a3
462 movi a3, PS_INTLEVEL_MASK
463 and a0, a0, a3
466 movi a3, PS_INTLEVEL(1)
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/Zephyr-latest/include/zephyr/arch/xtensa/
Dsyscall.h72 register uintptr_t a3 __asm__("%a3") = arg2; in arch_syscall_invoke6()
80 : "r" (a2), "r" (a6), "r" (a3), "r" (a4), in arch_syscall_invoke6()
97 register uintptr_t a3 __asm__("%a3") = arg2; in arch_syscall_invoke5()
104 : "r" (a2), "r" (a6), "r" (a3), "r" (a4), in arch_syscall_invoke5()
121 register uintptr_t a3 __asm__("%a3") = arg2; in arch_syscall_invoke4()
127 : "r" (a2), "r" (a6), "r" (a3), "r" (a4), in arch_syscall_invoke4()
140 register uintptr_t a3 __asm__("%a3") = arg2; in arch_syscall_invoke3()
145 : "r" (a2), "r" (a6), "r" (a3), "r" (a4) in arch_syscall_invoke3()
156 register uintptr_t a3 __asm__("%a3") = arg2; in arch_syscall_invoke2()
160 : "r" (a2), "r" (a6), "r" (a3) in arch_syscall_invoke2()
/Zephyr-latest/include/zephyr/arch/arm64/
Darm-smccc.h18 unsigned long a3; member
41 unsigned long a2, unsigned long a3,
54 unsigned long a2, unsigned long a3,
/Zephyr-latest/tests/bluetooth/controller/ctrl_sw_privacy_unit/src/
Dmain.c48 bt_addr_t a1, a2, a3, a4, a5; in helper_prpa_add() local
53 bt_addr_copy(&a3, BT_ADDR_INIT(0x32, 0x33, 0x34, 0x35, 0x36, 0x37)); in helper_prpa_add()
67 prpa_cache_add(&a3); in helper_prpa_add()
68 pos = prpa_cache_find(&a3); in helper_prpa_add()
91 bt_addr_t a1, a2, a3, a4, a5; in helper_trpa_add() local
96 bt_addr_copy(&a3, BT_ADDR_INIT(0x32, 0x33, 0x34, 0x35, 0x36, 0x37)); in helper_trpa_add()
110 trpa_cache_add(&a3, 2); in helper_trpa_add()
111 pos = trpa_cache_find(&a3, 2); in helper_trpa_add()
/Zephyr-latest/include/zephyr/arch/riscv/
Dsyscall.h47 register unsigned long a3 __asm__ ("a3") = arg4; in arch_syscall_invoke6()
54 : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), in arch_syscall_invoke6()
68 register unsigned long a3 __asm__ ("a3") = arg4; in arch_syscall_invoke5()
74 : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (t0) in arch_syscall_invoke5()
86 register unsigned long a3 __asm__ ("a3") = arg4; in arch_syscall_invoke4()
91 : "r" (a1), "r" (a2), "r" (a3), "r" (t0) in arch_syscall_invoke4()
/Zephyr-latest/tests/drivers/tee/optee/src/
Dmain.c32 typedef void (*smc_cb_t)(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3,
43 uint32_t a3; member
54 void arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3, in arm_smccc_smc() argument
62 res->a3 = OPTEE_MSG_UID_3; in arm_smccc_smc()
75 t_call.smc_cb(a0, a1, a2, a3, a4, a5, a6, a7, res); in arm_smccc_smc()
78 wait_call.smc_cb(a0, a1, a2, a3, a4, a5, a6, a7, res); in arm_smccc_smc()
81 send_call.smc_cb(a0, a1, a2, a3, a4, a5, a6, a7, res); in arm_smccc_smc()
86 void arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3, in arm_smccc_hvc() argument
114 void fast_call(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3, in fast_call() argument
121 t_call.a3 = a3; in fast_call()
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/Zephyr-latest/subsys/logging/backends/
Dlog_backend_xtensa_sim.c26 register int a3 __asm__ ("a3") = 1; in char_out()
31 : "=a"(a2), "=a"(a3) in char_out()
32 : "a"(a2), "a"(a3), "a"(a4), "a"(a5)); in char_out()
/Zephyr-latest/drivers/console/
Dxtensa_sim_console.c23 register int a3 __asm__ ("a3") = 1; in arch_printk_char_out()
32 : "a" (a2), "a" (a3), "a" (a4), "a" (a5) in arch_printk_char_out()
Dwinstream_console.c32 register int a3 __asm__("a3") = 1; /* fd 1 == stdout */ in winstream_console_trace_out()
36 __asm__ volatile("simcall" : "+r"(a2), "+r"(a3) : "r"(a4), "r"(a5) : "memory"); in winstream_console_trace_out()
/Zephyr-latest/arch/riscv/core/
Dcoredump.c28 uint64_t a3; member
49 uint32_t a3;
98 arch_blk.r.a3 = esf->a3; in arch_coredump_info_dump()
Dthread.c41 stack_init->a3 = (unsigned long)p3; in arch_new_thread()
196 register void *a3 __asm__("a3") = p3; in arch_user_mode_enter()
201 : "r" (a0), "r" (a1), "r" (a2), "r" (a3), "r" (top_of_user_stack) in arch_user_mode_enter()
/Zephyr-latest/tests/lib/cmsis_dsp/common/
Dtest_common.h41 #define DEFINE_TEST_VARIANT3(suite, name, variant, a1, a2, a3) \ argument
44 test_##name(a1, a2, a3); \
47 #define DEFINE_TEST_VARIANT4(suite, name, variant, a1, a2, a3, a4) \ argument
50 test_##name(a1, a2, a3, a4); \
53 #define DEFINE_TEST_VARIANT5(suite, name, variant, a1, a2, a3, a4, a5) \ argument
56 test_##name(a1, a2, a3, a4, a5); \
59 #define DEFINE_TEST_VARIANT6(suite, name, variant, a1, a2, a3, a4, a5, a6) \ argument
62 test_##name(a1, a2, a3, a4, a5, a6); \
65 #define DEFINE_TEST_VARIANT7(suite, name, variant, a1, a2, a3, a4, a5, a6, a7) \ argument
68 test_##name(a1, a2, a3, a4, a5, a6, a7); \
/Zephyr-latest/include/zephyr/drivers/sip_svc/
Dsip_svc_proto.h138 unsigned long a3; member
182 unsigned long a3; member
Dsip_svc_driver.h72 unsigned long *a1, unsigned long *a2, unsigned long *a3,
271 unsigned long *a1, unsigned long *a2, unsigned long *a3,
276 unsigned long *a3, unsigned long *a4, in z_impl_sip_svc_plat_async_res_req() argument
288 __ASSERT(a3, "a3 shouldn't be NULL"); in z_impl_sip_svc_plat_async_res_req()
295 return api->sip_svc_plat_async_res_req(dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size); in z_impl_sip_svc_plat_async_res_req()
/Zephyr-latest/drivers/fpga/
Dfpga_altera_agilex_bridge.c87 request.a3 = (uint64_t)cmd_size; in svc_client_close()
135 LOG_DBG("\ta3=%016lx", response->a3); in smc_callback()
141 private_data->response.a3 = response->a3; in smc_callback()
223 request.a3 = sizeof(uint32_t); in smc_send()
228 for (int32_t mbox_idx = 0; mbox_idx < request.a3 / 4; mbox_idx++) { in smc_send()
235 request.a3 = cmd_request[SMC_REQUEST_A3_INDEX]; in smc_send()
/Zephyr-latest/include/zephyr/arch/mips/
Dexception.h38 unsigned long a3; /* function argument */ member
/Zephyr-latest/tests/arch/arm/arm_interrupt/
DREADME.txt61 E: r0/a1: 0x20000000 r1/a2: 0x00000000 r2/a3: 0x20001e40
75 E: r0/a1: 0x00000003 r1/a2: 0x200020b8 r2/a3: 0x00000003
84 E: r0/a1: 0x00000004 r1/a2: 0x200020b8 r2/a3: 0x00000004
96 E: r0/a1: 0x00000004 r1/a2: 0x000000cf r2/a3: 0x00000000
108 E: r0/a1: 0x00000004 r1/a2: 0x00000017 r2/a3: 0x00000000
119 E: r0/a1: 0xdde8d9e7 r1/a2: 0x5510538d r2/a3: 0x00000d74
132 E: r0/a1: 0x00000000 r1/a2: 0x00000001 r2/a3: 0x00000002
/Zephyr-latest/soc/nordic/common/vpr/
Dsoc_isr_stacking.h32 unsigned long a3; \
53 unsigned long a3; \

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