Searched refs:XUARTPS_IXR_RTRIG (Results 1 – 1 of 1) sorted by relevance
117 #define XUARTPS_IXR_RTRIG 0x00000001U /**< RX FIFO trigger interrupt. */ macro960 sys_write32(XUARTPS_IXR_RTRIG, reg_base + XUARTPS_IER_OFFSET); in uart_xlnx_ps_irq_rx_enable()972 sys_write32(XUARTPS_IXR_RTRIG, reg_base + XUARTPS_IDR_OFFSET); in uart_xlnx_ps_irq_rx_disable()987 if ((reg_val & XUARTPS_IXR_RTRIG) == 0) { in uart_xlnx_ps_irq_rx_ready()990 sys_write32(XUARTPS_IXR_RTRIG, reg_base + XUARTPS_ISR_OFFSET); in uart_xlnx_ps_irq_rx_ready()
