1 /* Copyright (C) 2023 BeagleBoard.org Foundation
2  * Copyright (C) 2023 S Prashanth
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef ZEPHYR_DRIVERS_INTC_VIM_H_
8 #define ZEPHYR_DRIVERS_INTC_VIM_H_
9 
10 #include <stdint.h>
11 
12 #include <zephyr/devicetree.h>
13 #include <zephyr/dt-bindings/interrupt-controller/ti-vim.h>
14 #include <zephyr/sys/util_macro.h>
15 
16 #define VIM_BASE_ADDR             DT_REG_ADDR(DT_INST(0, ti_vim))
17 
18 #define VIM_MAX_IRQ_PER_GROUP     (32)
19 #define VIM_MAX_GROUP_NUM         ((uint32_t)(CONFIG_NUM_IRQS / VIM_MAX_IRQ_PER_GROUP))
20 
21 #define VIM_GET_IRQ_GROUP_NUM(n)  ((uint32_t)((n) / VIM_MAX_IRQ_PER_GROUP))
22 #define VIM_GET_IRQ_BIT_NUM(n)    ((uint32_t)((n) % VIM_MAX_IRQ_PER_GROUP))
23 
24 #define VIM_PRI_INT_MAX           (15)
25 
26 #define VIM_PID             (VIM_BASE_ADDR + 0x0000)
27 #define VIM_INFO            (VIM_BASE_ADDR + 0x0004)
28 #define VIM_PRIIRQ          (VIM_BASE_ADDR + 0x0008)
29 #define VIM_PRIFIQ          (VIM_BASE_ADDR + 0x000C)
30 #define VIM_IRQGSTS         (VIM_BASE_ADDR + 0x0010)
31 #define VIM_FIQGSTS         (VIM_BASE_ADDR + 0x0014)
32 #define VIM_IRQVEC          (VIM_BASE_ADDR + 0x0018)
33 #define VIM_FIQVEC          (VIM_BASE_ADDR + 0x001C)
34 #define VIM_ACTIRQ          (VIM_BASE_ADDR + 0x0020)
35 #define VIM_ACTFIQ          (VIM_BASE_ADDR + 0x0024)
36 #define VIM_DEDVEC          (VIM_BASE_ADDR + 0x0030)
37 
38 #define VIM_RAW(n)          (VIM_BASE_ADDR + (0x400) + ((n) * 0x20))
39 #define VIM_STS(n)          (VIM_BASE_ADDR + (0x404) + ((n) * 0x20))
40 #define VIM_INTR_EN_SET(n)  (VIM_BASE_ADDR + (0x408) + ((n) * 0x20))
41 #define VIM_INTR_EN_CLR(n)  (VIM_BASE_ADDR + (0x40c) + ((n) * 0x20))
42 #define VIM_IRQSTS(n)       (VIM_BASE_ADDR + (0x410) + ((n) * 0x20))
43 #define VIM_FIQSTS(n)       (VIM_BASE_ADDR + (0x414) + ((n) * 0x20))
44 #define VIM_INTMAP(n)       (VIM_BASE_ADDR + (0x418) + ((n) * 0x20))
45 #define VIM_INTTYPE(n)      (VIM_BASE_ADDR + (0x41c) + ((n) * 0x20))
46 #define VIM_PRI_INT(n)      (VIM_BASE_ADDR + (0x1000) + ((n) * 0x4))
47 #define VIM_VEC_INT(n)      (VIM_BASE_ADDR + (0x2000) + ((n) * 0x4))
48 
49 /* RAW */
50 
51 #define VIM_GRP_RAW_STS_MASK                 (BIT_MASK(32))
52 #define VIM_GRP_RAW_STS_SHIFT                (0x00000000U)
53 #define VIM_GRP_RAW_STS_RESETVAL             (0x00000000U)
54 #define VIM_GRP_RAW_STS_MAX                  (BIT_MASK(32))
55 
56 #define VIM_GRP_RAW_RESETVAL                 (0x00000000U)
57 
58 /* STS */
59 
60 #define VIM_GRP_STS_MSK_MASK                 (BIT_MASK(32))
61 #define VIM_GRP_STS_MSK_SHIFT                (0x00000000U)
62 #define VIM_GRP_STS_MSK_RESETVAL             (0x00000000U)
63 #define VIM_GRP_STS_MSK_MAX                  (BIT_MASK(32))
64 
65 #define VIM_GRP_STS_RESETVAL                 (0x00000000U)
66 
67 /* INTR_EN_SET */
68 
69 #define VIM_GRP_INTR_EN_SET_MSK_MASK         (BIT_MASK(32))
70 #define VIM_GRP_INTR_EN_SET_MSK_SHIFT        (0x00000000U)
71 #define VIM_GRP_INTR_EN_SET_MSK_RESETVAL     (0x00000000U)
72 #define VIM_GRP_INTR_EN_SET_MSK_MAX          (BIT_MASK(32))
73 
74 #define VIM_GRP_INTR_EN_SET_RESETVAL         (0x00000000U)
75 
76 /* INTR_EN_CLR */
77 
78 #define VIM_GRP_INTR_EN_CLR_MSK_MASK         (BIT_MASK(32))
79 #define VIM_GRP_INTR_EN_CLR_MSK_SHIFT        (0x00000000U)
80 #define VIM_GRP_INTR_EN_CLR_MSK_RESETVAL     (0x00000000U)
81 #define VIM_GRP_INTR_EN_CLR_MSK_MAX          (BIT_MASK(32))
82 
83 #define VIM_GRP_INTR_EN_CLR_RESETVAL         (0x00000000U)
84 
85 /* IRQSTS */
86 
87 #define VIM_GRP_IRQSTS_MSK_MASK              (BIT_MASK(32))
88 #define VIM_GRP_IRQSTS_MSK_SHIFT             (0x00000000U)
89 #define VIM_GRP_IRQSTS_MSK_RESETVAL          (0x00000000U)
90 #define VIM_GRP_IRQSTS_MSK_MAX               (BIT_MASK(32))
91 
92 #define VIM_GRP_IRQSTS_RESETVAL              (0x00000000U)
93 
94 /* FIQSTS */
95 
96 #define VIM_GRP_FIQSTS_MSK_MASK              (BIT_MASK(32))
97 #define VIM_GRP_FIQSTS_MSK_SHIFT             (0x00000000U)
98 #define VIM_GRP_FIQSTS_MSK_RESETVAL          (0x00000000U)
99 #define VIM_GRP_FIQSTS_MSK_MAX               (BIT_MASK(32))
100 
101 #define VIM_GRP_FIQSTS_RESETVAL              (0x00000000U)
102 
103 /* INTMAP */
104 
105 #define VIM_GRP_INTMAP_MSK_MASK              (BIT_MASK(32))
106 #define VIM_GRP_INTMAP_MSK_SHIFT             (0x00000000U)
107 #define VIM_GRP_INTMAP_MSK_RESETVAL          (0x00000000U)
108 #define VIM_GRP_INTMAP_MSK_MAX               (BIT_MASK(32))
109 
110 #define VIM_GRP_INTMAP_RESETVAL              (0x00000000U)
111 
112 /* INTTYPE */
113 
114 #define VIM_GRP_INTTYPE_MSK_MASK             (BIT_MASK(32))
115 #define VIM_GRP_INTTYPE_MSK_SHIFT            (0x00000000U)
116 #define VIM_GRP_INTTYPE_MSK_RESETVAL         (0x00000000U)
117 #define VIM_GRP_INTTYPE_MSK_MAX              (BIT_MASK(32))
118 
119 #define VIM_GRP_INTTYPE_RESETVAL             (0x00000000U)
120 
121 /* INT */
122 
123 #define VIM_PRI_INT_VAL_MASK                 (BIT_MASK(4))
124 #define VIM_PRI_INT_VAL_SHIFT                (0x00000000U)
125 #define VIM_PRI_INT_VAL_RESETVAL             (BIT_MASK(4))
126 #define VIM_PRI_INT_VAL_MAX                  (BIT_MASK(4))
127 
128 #define VIM_PRI_INT_RESETVAL                 (BIT_MASK(4))
129 
130 /* INT */
131 
132 #define VIM_VEC_INT_VAL_MASK                 (0xFFFFFFFCU)
133 #define VIM_VEC_INT_VAL_SHIFT                (0x00000002U)
134 #define VIM_VEC_INT_VAL_RESETVAL             (0x00000000U)
135 #define VIM_VEC_INT_VAL_MAX                  (BIT_MASK(30))
136 
137 #define VIM_VEC_INT_RESETVAL                 (0x00000000U)
138 
139 /* INFO */
140 
141 #define VIM_INFO_INTERRUPTS_MASK             (BIT_MASK(11))
142 #define VIM_INFO_INTERRUPTS_SHIFT            (0x00000000U)
143 #define VIM_INFO_INTERRUPTS_RESETVAL         (0x00000400U)
144 #define VIM_INFO_INTERRUPTS_MAX              (BIT_MASK(11))
145 
146 #define VIM_INFO_RESETVAL                    (0x00000400U)
147 
148 /* PRIIRQ */
149 
150 #define VIM_PRIIRQ_VALID_MASK                (0x80000000U)
151 #define VIM_PRIIRQ_VALID_SHIFT               (BIT_MASK(5))
152 #define VIM_PRIIRQ_VALID_RESETVAL            (0x00000000U)
153 #define VIM_PRIIRQ_VALID_MAX                 (0x00000001U)
154 
155 #define VIM_PRIIRQ_VALID_VAL_TRUE            (0x1U)
156 #define VIM_PRIIRQ_VALID_VAL_FALSE           (0x0U)
157 
158 #define VIM_PRIIRQ_PRI_MASK                  (0x000F0000U)
159 #define VIM_PRIIRQ_PRI_SHIFT                 (0x00000010U)
160 #define VIM_PRIIRQ_PRI_RESETVAL              (0x00000000U)
161 #define VIM_PRIIRQ_PRI_MAX                   (BIT_MASK(4))
162 
163 #define VIM_PRIIRQ_NUM_MASK                  (BIT_MASK(10))
164 #define VIM_PRIIRQ_NUM_SHIFT                 (0x00000000U)
165 #define VIM_PRIIRQ_NUM_RESETVAL              (0x00000000U)
166 #define VIM_PRIIRQ_NUM_MAX                   (BIT_MASK(10))
167 
168 #define VIM_PRIIRQ_RESETVAL                  (0x00000000U)
169 
170 /* PRIFIQ */
171 
172 #define VIM_PRIFIQ_VALID_MASK                (0x80000000U)
173 #define VIM_PRIFIQ_VALID_SHIFT               (BIT_MASK(5))
174 #define VIM_PRIFIQ_VALID_RESETVAL            (0x00000000U)
175 #define VIM_PRIFIQ_VALID_MAX                 (0x00000001U)
176 
177 #define VIM_PRIFIQ_VALID_VAL_TRUE            (0x1U)
178 #define VIM_PRIFIQ_VALID_VAL_FALSE           (0x0U)
179 
180 #define VIM_PRIFIQ_PRI_MASK                  (0x000F0000U)
181 #define VIM_PRIFIQ_PRI_SHIFT                 (0x00000010U)
182 #define VIM_PRIFIQ_PRI_RESETVAL              (0x00000000U)
183 #define VIM_PRIFIQ_PRI_MAX                   (BIT_MASK(4))
184 
185 #define VIM_PRIFIQ_NUM_MASK                  (BIT_MASK(10))
186 #define VIM_PRIFIQ_NUM_SHIFT                 (0x00000000U)
187 #define VIM_PRIFIQ_NUM_RESETVAL              (0x00000000U)
188 #define VIM_PRIFIQ_NUM_MAX                   (BIT_MASK(10))
189 
190 #define VIM_PRIFIQ_RESETVAL                  (0x00000000U)
191 
192 /* IRQGSTS */
193 
194 #define VIM_IRQGSTS_STS_MASK                 (BIT_MASK(32))
195 #define VIM_IRQGSTS_STS_SHIFT                (0x00000000U)
196 #define VIM_IRQGSTS_STS_RESETVAL             (0x00000000U)
197 #define VIM_IRQGSTS_STS_MAX                  (BIT_MASK(32))
198 
199 #define VIM_IRQGSTS_RESETVAL                 (0x00000000U)
200 
201 /* FIQGSTS */
202 
203 #define VIM_FIQGSTS_STS_MASK                 (BIT_MASK(32))
204 #define VIM_FIQGSTS_STS_SHIFT                (0x00000000U)
205 #define VIM_FIQGSTS_STS_RESETVAL             (0x00000000U)
206 #define VIM_FIQGSTS_STS_MAX                  (BIT_MASK(32))
207 
208 #define VIM_FIQGSTS_RESETVAL                 (0x00000000U)
209 
210 /* IRQVEC */
211 
212 #define VIM_IRQVEC_ADDR_MASK                 (0xFFFFFFFCU)
213 #define VIM_IRQVEC_ADDR_SHIFT                (0x00000002U)
214 #define VIM_IRQVEC_ADDR_RESETVAL             (0x00000000U)
215 #define VIM_IRQVEC_ADDR_MAX                  (BIT_MASK(30))
216 
217 #define VIM_IRQVEC_RESETVAL                  (0x00000000U)
218 
219 /* FIQVEC */
220 
221 #define VIM_FIQVEC_ADDR_MASK                 (0xFFFFFFFCU)
222 #define VIM_FIQVEC_ADDR_SHIFT                (0x00000002U)
223 #define VIM_FIQVEC_ADDR_RESETVAL             (0x00000000U)
224 #define VIM_FIQVEC_ADDR_MAX                  (BIT_MASK(30))
225 
226 #define VIM_FIQVEC_RESETVAL                  (0x00000000U)
227 
228 /* ACTIRQ */
229 
230 #define VIM_ACTIRQ_VALID_MASK                (0x80000000U)
231 #define VIM_ACTIRQ_VALID_SHIFT               (BIT_MASK(5))
232 #define VIM_ACTIRQ_VALID_RESETVAL            (0x00000000U)
233 #define VIM_ACTIRQ_VALID_MAX                 (0x00000001U)
234 
235 #define VIM_ACTIRQ_VALID_VAL_TRUE            (0x1U)
236 #define VIM_ACTIRQ_VALID_VAL_FALSE           (0x0U)
237 
238 #define VIM_ACTIRQ_PRI_MASK                  (0x000F0000U)
239 #define VIM_ACTIRQ_PRI_SHIFT                 (0x00000010U)
240 #define VIM_ACTIRQ_PRI_RESETVAL              (0x00000000U)
241 #define VIM_ACTIRQ_PRI_MAX                   (BIT_MASK(4))
242 
243 #define VIM_ACTIRQ_NUM_MASK                  (BIT_MASK(10))
244 #define VIM_ACTIRQ_NUM_SHIFT                 (0x00000000U)
245 #define VIM_ACTIRQ_NUM_RESETVAL              (0x00000000U)
246 #define VIM_ACTIRQ_NUM_MAX                   (BIT_MASK(10))
247 
248 #define VIM_ACTIRQ_RESETVAL                  (0x00000000U)
249 
250 /* ACTFIQ */
251 
252 #define VIM_ACTFIQ_VALID_MASK                (0x80000000U)
253 #define VIM_ACTFIQ_VALID_SHIFT               (BIT_MASK(5))
254 #define VIM_ACTFIQ_VALID_RESETVAL            (0x00000000U)
255 #define VIM_ACTFIQ_VALID_MAX                 (0x00000001U)
256 
257 #define VIM_ACTFIQ_VALID_VAL_TRUE            (0x1U)
258 #define VIM_ACTFIQ_VALID_VAL_FALSE           (0x0U)
259 
260 #define VIM_ACTFIQ_PRI_MASK                  (0x000F0000U)
261 #define VIM_ACTFIQ_PRI_SHIFT                 (0x00000010U)
262 #define VIM_ACTFIQ_PRI_RESETVAL              (0x00000000U)
263 #define VIM_ACTFIQ_PRI_MAX                   (BIT_MASK(4))
264 
265 #define VIM_ACTFIQ_NUM_MASK                  (BIT_MASK(10))
266 #define VIM_ACTFIQ_NUM_SHIFT                 (0x00000000U)
267 #define VIM_ACTFIQ_NUM_RESETVAL              (0x00000000U)
268 #define VIM_ACTFIQ_NUM_MAX                   (BIT_MASK(10))
269 
270 #define VIM_ACTFIQ_RESETVAL                  (0x00000000U)
271 
272 /* DEDVEC */
273 
274 #define VIM_DEDVEC_ADDR_MASK                 (0xFFFFFFFCU)
275 #define VIM_DEDVEC_ADDR_SHIFT                (0x00000002U)
276 #define VIM_DEDVEC_ADDR_RESETVAL             (0x00000000U)
277 #define VIM_DEDVEC_ADDR_MAX                  (BIT_MASK(30))
278 
279 #define VIM_DEDVEC_RESETVAL                  (0x00000000U)
280 
281 /*
282  * VIM Driver Interface Functions
283  */
284 
285 /**
286  * @brief Get active interrupt ID.
287  *
288  * @return Returns the ID of an active interrupt.
289  */
290 unsigned int z_vim_irq_get_active(void);
291 
292 /**
293  * @brief Signal end-of-interrupt.
294  *
295  * @param irq interrupt ID.
296  */
297 void z_vim_irq_eoi(unsigned int irq);
298 
299 /**
300  * @brief Interrupt controller initialization.
301  */
302 void z_vim_irq_init(void);
303 
304 /**
305  * @brief Configure priority, irq type for the interrupt ID.
306  *
307  * @param irq interrupt ID.
308  * @param prio interrupt priority.
309  * @param flags interrupt flags.
310  */
311 void z_vim_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags);
312 
313 /**
314  * @brief Enable Interrupt.
315  *
316  * @param irq interrupt ID.
317  */
318 void z_vim_irq_enable(unsigned int irq);
319 
320 /**
321  * @brief Disable Interrupt.
322  *
323  * @param irq interrupt ID.
324  */
325 void z_vim_irq_disable(unsigned int irq);
326 
327 /**
328  * @brief Check if an interrupt is enabled.
329  *
330  * @param irq interrupt ID.
331  *
332  * @retval 0 If interrupt is disabled.
333  * @retval 1 If interrupt is enabled.
334  */
335 int z_vim_irq_is_enabled(unsigned int irq);
336 
337 /**
338  * @brief Raise a software interrupt.
339  *
340  * @param irq interrupt ID.
341  */
342 void z_vim_arm_enter_irq(int irq);
343 
344 #endif /* ZEPHYR_DRIVERS_INTC_VIM_H_ */
345