Searched refs:STM32_SRC_PLL1_R (Results 1 – 8 of 8) sorted by relevance
27 #define STM32_SRC_PLL1_R (STM32_SRC_PLL1_Q + 1) macro28 #define STM32_SRC_PLL2_P (STM32_SRC_PLL1_R + 1)
26 #define STM32_SRC_PLL1_R (STM32_SRC_PLL1_Q + 1) macro27 #define STM32_SRC_PLL2_P (STM32_SRC_PLL1_R + 1)
24 #define STM32_SRC_PLL1_R (STM32_SRC_PLL1_Q + 1) macro
54 ((src_clk == STM32_SRC_PLL1_R) && IS_ENABLED(STM32_PLL_R_ENABLED))) { in enabled_clock()224 case STM32_SRC_PLL1_R: in stm32_clock_control_get_subsys_rate()
131 ((src_clk == STM32_SRC_PLL1_R) && IS_ENABLED(STM32_PLL_R_ENABLED)) || in enabled_clock()283 case STM32_SRC_PLL1_R: in stm32_clock_control_get_subsys_rate()
135 ((src_clk == STM32_SRC_PLL1_R) && IS_ENABLED(STM32_PLL_R_ENABLED)) || in enabled_clock()296 case STM32_SRC_PLL1_R: in stm32_clock_control_get_subsys_rate()
346 ((src_clk == STM32_SRC_PLL1_R) && IS_ENABLED(STM32_PLL_R_ENABLED)) || in enabled_clock()513 case STM32_SRC_PLL1_R: in stm32_clock_control_get_subsys_rate()