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Searched refs:SDMMC_SEL (Results 1 – 9 of 9) sorted by relevance

/Zephyr-Core-3.6.0/include/zephyr/dt-bindings/clock/
Dstm32f427_clock.h19 #define SDMMC_SEL(val) STM32_CLOCK(val, 1, 28, DCKCFGR_REG) macro
Dstm32l4_clock.h101 #define SDMMC_SEL(val) STM32_CLOCK(val, 1, 14, CCIPR2_REG) macro
Dstm32h7_clock.h103 #define SDMMC_SEL(val) STM32_CLOCK(val, 1, 16, D1CCIPR_REG) macro
Dstm32u5_clock.h109 #define SDMMC_SEL(val) STM32_CLOCK(val, 1, 14, CCIPR2_REG) macro
/Zephyr-Core-3.6.0/dts/arm/st/f4/
Dstm32f469.dtsi15 <&rcc STM32_SRC_SYSCLK SDMMC_SEL(1)>;
/Zephyr-Core-3.6.0/boards/arm/stm32h747i_disco/
Dstm32h747i_disco_m7.dts216 <&rcc STM32_SRC_PLL2_R SDMMC_SEL(1)>;
/Zephyr-Core-3.6.0/dts/arm/st/u5/
Dstm32u5.dtsi739 <&rcc STM32_SRC_HSI48 SDMMC_SEL(0)>;
749 <&rcc STM32_SRC_HSI48 SDMMC_SEL(0)>;
/Zephyr-Core-3.6.0/dts/arm/st/h7/
Dstm32h7.dtsi997 <&rcc STM32_SRC_PLL1_Q SDMMC_SEL(0)>;
1007 <&rcc STM32_SRC_PLL1_Q SDMMC_SEL(0)>;
/Zephyr-Core-3.6.0/dts/arm/st/l5/
Dstm32l5.dtsi400 <&rcc STM32_SRC_HSI48 SDMMC_SEL(0)>;