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Searched refs:Regs (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.6.0/soc/xtensa/intel_adsp/tools/
Dacetool.py51 self.hda = Regs(hdamem)
64 self.regs = Regs(self.base)
78 self.dbg0 = Regs(hdamem + 0x0084 + (0x20*stream_id))
230 hda = Regs(hdamem)
244 sd = Regs(hdamem + 0x0080 + (hda_ostream_id * 0x20))
255 dsp = Regs(bar4_mem)
341 class Regs: class
Dcavstool.py47 self.hda = Regs(hdamem)
60 self.regs = Regs(self.base)
74 self.dbg0 = Regs(hdamem + 0x0084 + (0x20*stream_id))
224 hda = Regs(hdamem)
238 sd = Regs(hdamem + 0x0080 + (hda_ostream_id * 0x20))
249 dsp = Regs(bar4_mem)
331 class Regs: class