Searched refs:REG_WRITE (Results 1 – 8 of 8) sorted by relevance
| /Zephyr-Core-3.6.0/drivers/ethernet/ |
| D | eth_dwmac.c | 198 REG_WRITE(DMA_CHn_TXDESC_TAIL_PTR(0), TXDESC_PHYS_L(d_idx)); in dwmac_send()
390 REG_WRITE(DMA_CHn_RXDESC_TAIL_PTR(0), RXDESC_PHYS_L(d_idx)); in dwmac_rx_refill_thread()
400 REG_WRITE(DMA_CHn_STATUS(ch), status); in dwmac_dma_irq()
464 REG_WRITE(MAC_ADDRESS_HIGH(n), reg_val | MAC_ADDRESS_HIGH_AE); in dwmac_set_mac_addr()
466 REG_WRITE(MAC_ADDRESS_LOW(n), reg_val); in dwmac_set_mac_addr()
492 REG_WRITE(MAC_PKT_FILTER, in dwmac_set_config()
496 REG_WRITE(MAC_PKT_FILTER, in dwmac_set_config()
545 REG_WRITE(DMA_CHn_TX_CTRL(0), reg_val | DMA_CHn_TX_CTRL_St); in dwmac_iface_init()
547 REG_WRITE(DMA_CHn_RX_CTRL(0), reg_val | DMA_CHn_RX_CTRL_SR); in dwmac_iface_init()
550 REG_WRITE(MAC_CONF, reg_val); in dwmac_iface_init()
[all …]
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| D | eth_dwmac_mmu.c | 69 REG_WRITE(MAC_CONF, in dwmac_platform_init()
73 REG_WRITE(DMA_SYSBUS_MODE, in dwmac_platform_init()
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| D | eth_dwmac_stm32h7x.c | 104 REG_WRITE(MAC_CONF, in dwmac_platform_init()
108 REG_WRITE(DMA_SYSBUS_MODE, in dwmac_platform_init()
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| D | eth_dwmac_priv.h | 77 #define REG_WRITE(r, v) sys_write32((v), p->base_addr + (r)) macro
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| /Zephyr-Core-3.6.0/soc/riscv/espressif_esp32/esp32c3/ |
| D | soc.c | 156 REG_WRITE(SYSTEM_CORE_RST_EN_REG, 0); in esp_restart_noos()
164 REG_WRITE(SYSTEM_PERIP_RST_EN0_REG, 0); in esp_restart_noos()
167 REG_WRITE(SYSTEM_PERIP_RST_EN1_REG, 0); in esp_restart_noos()
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| /Zephyr-Core-3.6.0/soc/xtensa/espressif_esp32/esp32s3/ |
| D | soc_appcpu.c | 147 REG_WRITE(SYSTEM_CORE_RST_EN_REG, 0); in esp_restart_noos()
152 REG_WRITE(SYSTEM_PERIP_RST_EN0_REG, 0); in esp_restart_noos()
156 REG_WRITE(SYSTEM_PERIP_RST_EN1_REG, 0); in esp_restart_noos()
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| D | soc.c | 290 REG_WRITE(SYSTEM_CORE_RST_EN_REG, 0); in esp_restart_noos()
295 REG_WRITE(SYSTEM_PERIP_RST_EN0_REG, 0); in esp_restart_noos()
299 REG_WRITE(SYSTEM_PERIP_RST_EN1_REG, 0); in esp_restart_noos()
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| /Zephyr-Core-3.6.0/drivers/input/ |
| D | input_esp32_touch_sensor.c | 156 REG_WRITE(RTC_CNTL_INT_CLR_REG, status);
163 REG_WRITE(RTC_CNTL_INT_ENA_REG, 0);
164 REG_WRITE(RTC_CNTL_INT_CLR_REG, UINT32_MAX);
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