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Searched refs:RCC_PLLP_ENABLE (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.6.0/drivers/clock_control/
Dclock_stm32_ll_common.c50 #define RCC_PLLP_ENABLE() SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPEN) macro
52 #define RCC_PLLP_ENABLE() macro
519 RCC_PLLP_ENABLE(); in set_up_plls()