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Searched refs:R8A7795_CLK_CANFD_DIV_MASK (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.6.0/drivers/clock_control/
Dclock_control_r8a7795_cpg_mssr.c31 #define R8A7795_CLK_CANFD_DIV_MASK 0x3f macro
195 return (reg_val & R8A7795_CLK_CANFD_DIV_MASK) + 1; in r8a7795_get_div_helper()
236 if (*divider <= R8A7795_CLK_CANFD_DIV_MASK) { in r8a7795_set_rate_helper()
237 *div_mask = R8A7795_CLK_CANFD_DIV_MASK; in r8a7795_set_rate_helper()