Searched refs:P_RW_U_NA_Msk (Results 1 – 5 of 5) sorted by relevance
| /Zephyr-Core-3.6.0/include/zephyr/arch/arm/mpu/ |
| D | arm_mpu_v8.h | 46 #define P_RW_U_NA_Msk ((P_RW_U_NA << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) macro
201 P_RW_U_NA_Msk | NON_SHAREABLE_Msk, /* AP, XN, SH */ \
226 P_RW_U_NA_Msk | NON_SHAREABLE_Msk, /* AP, XN, SH */ \
255 .rbar = NOT_EXEC | P_RW_U_NA_Msk | NON_SHAREABLE_Msk, \
276 P_RW_U_NA_Msk | NON_SHAREABLE_Msk, /* AP, XN, SH */ \
285 P_RW_U_NA_Msk | NON_SHAREABLE_Msk, /* AP, XN, SH */ \
346 {(P_RW_U_NA_Msk | NOT_EXEC), MPU_MAIR_INDEX_SRAM})
371 case P_RW_U_NA_Msk: \
399 {(P_RW_U_NA_Msk | NOT_EXEC | OUTER_SHAREABLE_Msk), \
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| D | arm_mpu_v7m.h | 25 #define P_RW_U_NA_Msk ((P_RW_U_NA << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) macro
127 IF_ENABLED(CONFIG_XIP, (MPU_RASR_XN_Msk |)) size | P_RW_U_NA_Msk) \
132 MPU_RASR_XN_Msk | size | P_RW_U_NA_Msk) \
147 P_RW_U_NA_Msk) }
148 #define REGION_IO_ATTR(size) { (DEVICE_NON_SHAREABLE | size | P_RW_U_NA_Msk) }
168 #define _K_MEM_PARTITION_P_RW_U_NA (P_RW_U_NA_Msk | NOT_EXEC)
231 case P_RW_U_NA_Msk: \
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| /Zephyr-Core-3.6.0/include/zephyr/arch/arm64/cortex_r/ |
| D | arm_mpu.h | 41 #define P_RW_U_NA_Msk ((P_RW_U_NA << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) macro
138 .rbar = NOT_EXEC | P_RW_U_NA_Msk | NON_SHAREABLE_Msk, \
146 .rbar = NOT_EXEC | P_RW_U_NA_Msk | OUTER_SHAREABLE_Msk, \
154 .rbar = NOT_EXEC | P_RW_U_NA_Msk | NON_SHAREABLE_Msk, \
233 {(P_RW_U_NA_Msk), MPU_MAIR_INDEX_SRAM})
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| /Zephyr-Core-3.6.0/soc/arm/xilinx_zynqmp/ |
| D | arm_mpu_regions.c | 27 .rasr = (P_RW_U_NA_Msk \
35 .rasr = (P_RW_U_NA_Msk \
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| /Zephyr-Core-3.6.0/soc/arm/st_stm32/stm32h7/ |
| D | mpu_regions.c | 22 MPU_RASR_XN_Msk | P_RW_U_NA_Msk) }),
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