PLL_FB_DIV_MAX (reference) in projects: Zephyr-Core-3.6.0

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Searched refs:PLL_FB_DIV_MAX (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.6.0/drivers/clock_control/
D	clock_control_rpi_pico.c	`38 #define PLL_FB_DIV_MAX 320 macro 718 BUILD_ASSERT((FB_DIV(pll_sys) >= PLL_FB_DIV_MIN) && (FB_DIV(pll_sys) <= PLL_FB_DIV_MAX), 728 BUILD_ASSERT((FB_DIV(pll_usb) >= PLL_FB_DIV_MIN) && (FB_DIV(pll_usb) <= PLL_FB_DIV_MAX),`

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