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Searched refs:PHY_DLL_MASTER_OFFSET (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.6.0/drivers/flash/
Dflash_cadence_nand_ll.h240 #define PHY_DLL_MASTER_OFFSET (0x0000200c) macro
Dflash_cadence_nand_ll.c234 sys_write32(PHY_DLL_MASTER_CTRL_REG_SDR, (base_address + PHY_DLL_MASTER_OFFSET)); in cdns_nand_set_opr_mode()
256 sys_write32(PHY_DLL_MASTER_CTRL_REG_DDR, (base_address + PHY_DLL_MASTER_OFFSET)); in cdns_nand_set_opr_mode()