MCUX_USDHC1_CLK (reference) in projects: Zephyr-Core-3.6.0

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Searched refs:MCUX_USDHC1_CLK (Results 1 – 4 of 4) sorted by relevance

/Zephyr-Core-3.6.0/include/zephyr/dt-bindings/clock/
D	mcux_lpc_syscon_clock.h	`28 #define MCUX_USDHC1_CLK 20 macro`
/Zephyr-Core-3.6.0/drivers/clock_control/
D	clock_control_mcux_syscon.c	`115 case MCUX_USDHC1_CLK: in mcux_lpc_syscon_clock_control_get_subsys_rate()`
/Zephyr-Core-3.6.0/dts/arm/nxp/
D	nxp_rt6xx_common.dtsi	`358 clocks = <&clkctl1 MCUX_USDHC1_CLK>;`
D	nxp_rt5xx_common.dtsi	`513 clocks = <&clkctl1 MCUX_USDHC1_CLK>;`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
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edtt-2.7.6
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