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Searched refs:MCUX_CTIMER2_CLK (Results 1 – 6 of 6) sorted by relevance

/Zephyr-Core-3.6.0/include/zephyr/dt-bindings/clock/
Dmcux_lpc_syscon_clock.h35 #define MCUX_CTIMER2_CLK 2 macro
/Zephyr-Core-3.6.0/samples/basic/blinky_pwm/boards/
Dmimxrt685_evk_cm33.overlay22 clocks = <&clkctl1 MCUX_CTIMER2_CLK>;
/Zephyr-Core-3.6.0/drivers/clock_control/
Dclock_control_mcux_syscon.c144 case (MCUX_CTIMER2_CLK + MCUX_CTIMER_CLK_OFFSET): in mcux_lpc_syscon_clock_control_get_subsys_rate()
/Zephyr-Core-3.6.0/dts/arm/nxp/
Dnxp_lpc55S6x_common.dtsi373 clocks = <&syscon MCUX_CTIMER2_CLK>;
Dnxp_rt6xx_common.dtsi422 clocks = <&clkctl1 MCUX_CTIMER2_CLK>;
Dnxp_rt5xx_common.dtsi586 clocks = <&clkctl1 MCUX_CTIMER2_CLK>;