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Searched refs:IT8XXX2_I2C_CTR1 (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.6.0/drivers/i2c/
Di2c_ite_enhance.c431 IT8XXX2_I2C_CTR1(base) = IT8XXX2_I2C_MDL_EN; in enhanced_i2c_start()
591 IT8XXX2_I2C_CTR1(base) = 0; in i2c_transaction()
775 IT8XXX2_I2C_CTR1(base) = 0; in enhanced_i2c_cq_isr()
807 IT8XXX2_I2C_CTR1(base) = IT8XXX2_I2C_MDL_EN | IT8XXX2_I2C_COMQ_EN; in enhanced_i2c_cmd_queue_trans()
1144 if (IT8XXX2_I2C_CTR1(base) & IT8XXX2_I2C_COMQ_EN) { in i2c_enhance_isr()
1191 IT8XXX2_I2C_CTR1(base) = 0; in i2c_enhance_init()
1362 IT8XXX2_I2C_CTR1(base) = IT8XXX2_I2C_MDL_EN; in i2c_enhance_target_register()
1407 IT8XXX2_I2C_CTR1(base) = IT8XXX2_I2C_COMQ_EN | IT8XXX2_I2C_MDL_EN; in i2c_enhance_target_register()
/Zephyr-Core-3.6.0/soc/riscv/ite_ec/common/
Dchip_chipregs.h1323 #define IT8XXX2_I2C_CTR1(base) ECREG(base + 0x0A) macro