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Searched refs:IT8XXX2_ECPM_SCDCR2 (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.6.0/soc/riscv/ite_ec/it8xxx2/
Dsoc.c152 IT8XXX2_ECPM_SCDCR2 = (pll->div_sspi << 4) | pll->div_smb; in chip_run_pll_sequence()
/Zephyr-Core-3.6.0/drivers/i2c/
Di2c_ite_enhance.c313 clk_div = (IT8XXX2_ECPM_SCDCR2 & 0x0F) + 1U; in i2c_enhanced_port_set_frequency()
/Zephyr-Core-3.6.0/soc/riscv/ite_ec/common/
Dchip_chipregs.h1247 #define IT8XXX2_ECPM_SCDCR2 ECREG(IT8XXX2_ECPM_BASE + 0x0e) macro