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Searched refs:DT_INST_PROP_OR (Results 1 – 25 of 115) sorted by relevance

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/Zephyr-Core-3.6.0/drivers/gpio/
Dgpio_xlnx_axi.c405 IF_ENABLED(UTIL_AND(DT_INST_PROP_OR(n, xlnx_is_dual, 1), \
411 .dout = DT_INST_PROP_OR(n, xlnx_dout_default_2, 0), \
412 .tri = DT_INST_PROP_OR(n, xlnx_tri_default_2, GENMASK(MAX_GPIOS - 1, 0)), \
419 DT_INST_PROP_OR(n, xlnx_gpio2_width, MAX_GPIOS)), \
423 .all_inputs = DT_INST_PROP_OR(n, xlnx_all_inputs_2, 0), \
424 .all_outputs = DT_INST_PROP_OR(n, xlnx_all_outputs_2, 0), \
438 .dout = DT_INST_PROP_OR(n, xlnx_dout_default, 0), \
439 .tri = DT_INST_PROP_OR(n, xlnx_tri_default, GENMASK(MAX_GPIOS - 1, 0)), \
441 DT_INST_PROP_OR(n, xlnx_is_dual, 1)), \
449 DT_INST_PROP_OR(n, xlnx_gpio_width, MAX_GPIOS)), \
[all …]
Dgpio_ite_it8xxx2_v2.c544 .wuc_base = DT_INST_PROP_OR(inst, wuc_base, {0}), \
545 .wuc_mask = DT_INST_PROP_OR(inst, wuc_mask, {0}), \
547 .has_volt_sel = DT_INST_PROP_OR(inst, has_volt_sel, {0}), \
549 .kbs_ctrl = DT_INST_PROP_OR(inst, keyboard_controller, 0), \
/Zephyr-Core-3.6.0/drivers/input/
Dinput_stmpe811.c523 BUILD_ASSERT(DT_INST_PROP_OR(index, raw_x_max, 4096) > \
524 DT_INST_PROP_OR(index, raw_x_min, 0), \
526 BUILD_ASSERT(DT_INST_PROP_OR(index, raw_y_max, 4096) > \
527 DT_INST_PROP_OR(index, raw_y_min, 0), \
536 .raw_x_min = DT_INST_PROP_OR(index, raw_x_min, 0), \
537 .raw_y_min = DT_INST_PROP_OR(index, raw_y_min, 0), \
538 .raw_x_max = DT_INST_PROP_OR(index, raw_x_max, 4096), \
539 .raw_y_max = DT_INST_PROP_OR(index, raw_y_max, 4096), \
/Zephyr-Core-3.6.0/drivers/dma/
Ddma_emul.c559 DT_INST_PROP_OR(_inst, dma_channel_mask, \
562 ? BIT_MASK(DT_INST_PROP_OR(_inst, dma_channels, 0)) \
567 DT_INST_PROP_OR(_inst, dma_channels, \
569 ? POPCOUNT(DT_INST_PROP_OR(_inst, dma_channel_mask, 0)) \
572 #define DMA_EMUL_INST_NUM_REQUESTS(_inst) DT_INST_PROP_OR(_inst, dma_requests, 1)
594 .addr_align = DT_INST_PROP_OR(_inst, dma_buf_addr_alignment, 1), \
595 .size_align = DT_INST_PROP_OR(_inst, dma_buf_size_alignment, 1), \
596 .copy_align = DT_INST_PROP_OR(_inst, dma_copy_alignment, 1), \
599 .work_q_priority = DT_INST_PROP_OR(_inst, priority, 0), \
605 DT_INST_PROP_OR(_inst, dma_channels, 0)); \
/Zephyr-Core-3.6.0/drivers/display/
Ddisplay_stm32_ltdc.c567 DT_INST_PROP_OR(inst, def_back_color_red, 0xFF), \
569 DT_INST_PROP_OR(inst, def_back_color_green, 0xFF), \
571 DT_INST_PROP_OR(inst, def_back_color_blue, 0xFF), \
574 .WindowX0 = DT_INST_PROP_OR(inst, window0_x0, 0), \
575 .WindowX1 = DT_INST_PROP_OR(inst, window0_x1, \
577 .WindowY0 = DT_INST_PROP_OR(inst, window0_y0, 0), \
578 .WindowY1 = DT_INST_PROP_OR(inst, window0_y1, \
589 DT_INST_PROP_OR(inst, def_back_color_red, 0xFF), \
591 DT_INST_PROP_OR(inst, def_back_color_green, 0xFF), \
593 DT_INST_PROP_OR(inst, def_back_color_blue, 0xFF), \
/Zephyr-Core-3.6.0/drivers/regulator/
Dregulator_fixed.c107 BUILD_ASSERT(DT_INST_PROP_OR(inst, regulator_min_microvolt, 0) == \
108 DT_INST_PROP_OR(inst, regulator_max_microvolt, 0), \
/Zephyr-Core-3.6.0/subsys/ipc/ipc_service/backends/
Dipc_icmsg.c66 DT_INST_PROP_OR(i, dcache_alignment, 0)); \
70 DT_INST_PROP_OR(i, dcache_alignment, 0)); \
Dipc_icmsg_me_initiator.c194 DT_INST_PROP_OR(i, dcache_alignment, 0)); \
198 DT_INST_PROP_OR(i, dcache_alignment, 0)); \
/Zephyr-Core-3.6.0/drivers/clock_control/
Dclock_control_mchp_xec.c1065 (enum pll_clk32k_src)DT_INST_PROP_OR(i, pll_32k_src, PLL_CLK32K_SRC_SO)
1068 (enum periph_clk32k_src)DT_INST_PROP_OR(0, periph_32k_src, PERIPH_CLK32K_SRC_SO_SO)
1077 (uint16_t)DT_INST_PROP_OR(0, xtal_enable_delay_ms, XEC_CC_XTAL_EN_DELAY_MS_DFLT),
1079 (uint16_t)DT_INST_PROP_OR(0, pll_lock_timeout_ms, XEC_CC_DFLT_PLL_LOCK_WAIT_MS),
1080 .period_min = (uint16_t)DT_INST_PROP_OR(0, clk32kmon_period_min, CNT32K_TMIN),
1081 .period_max = (uint16_t)DT_INST_PROP_OR(0, clk32kmon_period_max, CNT32K_TMAX),
1082 .core_clk_div = (uint8_t)DT_INST_PROP_OR(0, core_clk_div, CONFIG_SOC_MEC172X_PROC_CLK_DIV),
1083 .xtal_se = (uint8_t)DT_INST_PROP_OR(0, xtal_single_ended, 0),
1084 .max_dc_va = (uint8_t)DT_INST_PROP_OR(0, clk32kmon_duty_cycle_var_max, CNT32K_DUTY_MAX),
1085 .min_valid = (uint8_t)DT_INST_PROP_OR(0, clk32kmon_valid_min, CNT32K_VAL_MIN),
[all …]
Dclock_control_numaker_scc.c155 .clk_pclkdiv = DT_INST_PROP_OR(inst, clk_pclkdiv, 0), \
156 .core_clock = DT_INST_PROP_OR(inst, core_clock, 0), \
/Zephyr-Core-3.6.0/drivers/sensor/adltc2990/
Dadltc2990.c515 DT_INST_PROP_OR(inst, pins_v1_v2_current_resistor, 1), \
517 DT_INST_PROP_OR(inst, pin_v1_voltage_divider_resistors, NULL), \
519 DT_INST_PROP_OR(inst, pin_v2_voltage_divider_resistors, NULL), \
521 DT_INST_PROP_OR(inst, pins_v3_v4_current_resistor, 1), \
523 DT_INST_PROP_OR(inst, pin_v3_voltage_divider_resistors, NULL), \
525 DT_INST_PROP_OR(inst, pin_v4_voltage_divider_resistors, NULL)}; \
/Zephyr-Core-3.6.0/drivers/dai/nxp/sai/
Dsai.h93 DT_INST_PROP_OR(inst, tx_fifo_watermark,\
101 DT_INST_PROP_OR(inst, rx_fifo_watermark,\
118 DT_INST_PROP_OR(inst, fifo_depth, _SAI_FIFO_DEPTH(inst))
132 DT_INST_PROP_OR(inst, tx_sync_mode, kSAI_ModeAsync)
138 DT_INST_PROP_OR(inst, rx_sync_mode, kSAI_ModeAsync)
/Zephyr-Core-3.6.0/drivers/spi/
Dspi_xec_qmspi_ldma.c1004 DT_INST_PROP_OR(i, dcsckon, 6), \
1005 DT_INST_PROP_OR(i, dckcsoff, 4), \
1006 DT_INST_PROP_OR(i, dldh, 6), \
1007 DT_INST_PROP_OR(i, dcsda, 6))
1010 DT_INST_PROP_OR(i, tctradj, 0), \
1011 DT_INST_PROP_OR(i, tsckadj, 0))
1055 .clock_freq = DT_INST_PROP_OR(i, clock_frequency, MHZ(12)), \
1056 .cs1_freq = DT_INST_PROP_OR(i, cs1_freq, 0), \
1064 .chip_sel = DT_INST_PROP_OR(i, chip_select, 0), \
1065 .width = DT_INST_PROP_OR(0, lines, 1), \
/Zephyr-Core-3.6.0/drivers/sensor/npm1300_charger/
Dnpm1300_charger.c624 DT_INST_PROP_OR(n, term_warm_microvolt, DT_INST_PROP(n, term_microvolt)), \
636 .dietemp_thresholds = {DT_INST_PROP_OR(n, dietemp_stop_millidegrees, INT32_MAX), \
637 DT_INST_PROP_OR(n, dietemp_resume_millidegrees, \
639 .temp_thresholds = {DT_INST_PROP_OR(n, thermistor_cold_millidegrees, INT32_MAX), \
640 DT_INST_PROP_OR(n, thermistor_cool_millidegrees, INT32_MAX), \
641 DT_INST_PROP_OR(n, thermistor_warm_millidegrees, INT32_MAX), \
642 DT_INST_PROP_OR(n, thermistor_hot_millidegrees, INT32_MAX)}}; \
/Zephyr-Core-3.6.0/drivers/reset/
Dreset_rpi_pico.c151 .reg_width = DT_INST_PROP_OR(idx, reg_width, 4), \
152 .active_low = DT_INST_PROP_OR(idx, active_low, 0), \
/Zephyr-Core-3.6.0/drivers/interrupt_controller/
Dintc_eirq_nxp_s32.c139 .digFilterEn = DT_INST_PROP_OR(DT_CHILD(n, line_##idx), filter_enable, 0), \
140 .maxFilterCnt = DT_INST_PROP_OR(DT_CHILD(n, line_##idx), filter_counter, 0), \
155 .intFilterClk = DT_INST_PROP_OR(n, filter_prescaler, 0), \
/Zephyr-Core-3.6.0/drivers/bluetooth/hci/
Dcyw43xxx.c212 uint32_t hci_operation_speed = DT_INST_PROP_OR(0, hci_operation_speed, default_uart_speed); in bt_h4_vnd_setup()
213 uint32_t fw_download_speed = DT_INST_PROP_OR(0, fw_download_speed, default_uart_speed); in bt_h4_vnd_setup()
/Zephyr-Core-3.6.0/drivers/fpga/
Dfpga_ice40.c534 DT_INST_PROP_OR(inst, config_delay_us, FPGA_ICE40_CONFIG_DELAY_US_MIN)
537 DT_INST_PROP_OR(inst, creset_delay_us, FPGA_ICE40_CRESET_DELAY_US_MIN)
540 DT_INST_PROP_OR(inst, leading_clocks, FPGA_ICE40_LEADING_CLOCKS_MIN)
543 DT_INST_PROP_OR(inst, trailing_clocks, FPGA_ICE40_TRAILING_CLOCKS_MIN)
545 #define FPGA_ICE40_MHZ_DELAY_COUNT(inst) DT_INST_PROP_OR(inst, mhz_delay_count, 0)
547 #define FPGA_ICE40_GPIO_PINS(inst, name) (volatile gpio_port_pins_t *)DT_INST_PROP_OR(inst, name, 0)
/Zephyr-Core-3.6.0/drivers/counter/
Dcounter_sam_tc.c358 (TC_CMR_TCCLKS(DT_INST_PROP_OR(n, clk, 0)) \
363 DT_INST_PROP_OR(n, reg_cmr, COUNTER_SAM_TC_CMR(n))
385 .reg_rc = DT_INST_PROP_OR(n, reg_rc, 0), \
389 .tc_chan_num = DT_INST_PROP_OR(n, channel, 0), \
Dcounter_mcux_qtmr.c314 .freq = DT_INST_PROP_OR(n, freq, 0), \
323 .faultFilterCount = DT_INST_PROP_OR(n, filter_count, 0), \
324 .faultFilterPeriod = DT_INST_PROP_OR(n, filter_count, 0), \
/Zephyr-Core-3.6.0/modules/lvgl/input/
Dlvgl_encoder_input.c46 #define BUTTON_CODE(inst) DT_INST_PROP_OR(inst, button_input_code, -1)
/Zephyr-Core-3.6.0/drivers/espi/
Despi_saf_mchp_xec.c838 .poll_timeout = DT_INST_PROP_OR(inst, poll_timeout,
840 .consec_rd_timeout = DT_INST_PROP_OR(
842 .sus_chk_delay = DT_INST_PROP_OR(inst, sus_chk_delay,
844 .sus_rsm_interval = DT_INST_PROP_OR(inst, sus_rsm_interval,
846 .poll_interval = DT_INST_PROP_OR(inst, poll_interval,
/Zephyr-Core-3.6.0/drivers/dac/
Ddac_mcp4728.c101 .gain = DT_INST_PROP_OR(index, gain, {0}), \
/Zephyr-Core-3.6.0/drivers/syscon/
Dsyscon.c141 .reg_width = DT_INST_PROP_OR(inst, reg_io_width, 4), \
/Zephyr-Core-3.6.0/drivers/pinctrl/
Dpinctrl_ite_it8xxx2.c371 .func3_ext = DT_INST_PROP_OR(inst, func3_ext, {0}), \
372 .func3_ext_mask = DT_INST_PROP_OR(inst, func3_ext_mask, {0}), \

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