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Searched refs:D2CCIP1R_REG (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.6.0/include/zephyr/dt-bindings/clock/
Dstm32h7_clock.h91 #define D2CCIP1R_REG 0x50 macro
108 #define SAI1_SEL(val) STM32_CLOCK(val, 7, 0, D2CCIP1R_REG)
109 #define SAI23_SEL(val) STM32_CLOCK(val, 7, 6, D2CCIP1R_REG)
110 #define SPI123_SEL(val) STM32_CLOCK(val, 7, 12, D2CCIP1R_REG)
111 #define SPI45_SEL(val) STM32_CLOCK(val, 7, 16, D2CCIP1R_REG)
112 #define SPDIF_SEL(val) STM32_CLOCK(val, 3, 20, D2CCIP1R_REG)
113 #define DFSDM1_SEL(val) STM32_CLOCK(val, 1, 24, D2CCIP1R_REG)
114 #define FDCAN_SEL(val) STM32_CLOCK(val, 3, 28, D2CCIP1R_REG)
115 #define SWP_SEL(val) STM32_CLOCK(val, 1, 31, D2CCIP1R_REG)