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Searched refs:CSR_CLK_DIV_1 (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.6.0/drivers/timer/
Drcar_cmt_timer.c53 #define CSR_CLK_DIV_1 0x00000007 macro
121 sys_write32(CSR_FREE_RUN | CSR_CLK_DIV_1 | CSR_ENABLE_INTERRUPT, in sys_clock_driver_init()
125 sys_write32(CSR_FREE_RUN | CSR_CLK_DIV_1, in sys_clock_driver_init()