Searched refs:CSR_CLK_DIV_1 (Results 1 – 1 of 1) sorted by relevance
53 #define CSR_CLK_DIV_1 0x00000007 macro121 sys_write32(CSR_FREE_RUN | CSR_CLK_DIV_1 | CSR_ENABLE_INTERRUPT, in sys_clock_driver_init()125 sys_write32(CSR_FREE_RUN | CSR_CLK_DIV_1, in sys_clock_driver_init()