CLKMGR_PLLGLOB_AREFCLKDIV (reference) in projects: Zephyr-Core-3.6.0

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Searched refs:CLKMGR_PLLGLOB_AREFCLKDIV (Results 1 – 4 of 4) sorted by relevance

/Zephyr-Core-3.6.0/drivers/clock_control/
D	clock_control_agilex5_ll.h	`96 #define CLKMGR_PLLGLOB_AREFCLKDIV(x) (((x) & 0x00000F00) >> 8) macro`
D	clock_agilex_ll.c	`47 arefclkdiv = CLKMGR_PLLGLOB_AREFCLKDIV(pllglob); in get_ref_clk()`
D	clock_control_agilex5_ll.c	`75 arefclkdiv = CLKMGR_PLLGLOB_AREFCLKDIV(pllglob); in get_ref_clk()`
/Zephyr-Core-3.6.0/include/zephyr/drivers/clock_control/
D	clock_agilex_ll.h	`112 #define CLKMGR_PLLGLOB_AREFCLKDIV(x) (((x) & 0x00000f00) >> 8) macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
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